net/mlx5: Add reserved-gids support
Reserved GIDs are entries in the GID table in use by the mlx5_core and its submodules (e.g. FPGA, SRIOV, E-Swtich, netdev). The entries are reserved at the high indexes of the GID table. A mlx5 submodule may reserve a certain amount of GIDs for its own use during the load sequence by calling mlx5_core_reserve_gids, and must also take care to un-reserve these GIDs when it closes. Reservation is only allowed during the load sequence and before any interfaces (e.g. mlx5_ib or mlx5_en) are up. After reservation, a submodule may call mlx5_core_reserved_gid_alloc/ free to allocate entries from the reserved GIDs pool. Reserve a GID table entry for every supported FPGA QP. A later patch in the patchset will remove them from being reported to IB core. Another such patch will make use of these for FPGA QPs in Innova NIC. Added lib/mlx5.h to serve as a library for mlx5 submodlues, and to expose only public mlx5 API, more mlx5 library files will be added in future submissions. Signed-off-by: Ilan Tayari <ilant@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Ilan Tayari
Saeed Mahameed
parent
9ade8c7c3c
commit
52ec462eca
@ -4,7 +4,7 @@ subdir-ccflags-y += -I$(src)
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mlx5_core-y := main.o cmd.o debugfs.o fw.o eq.o uar.o pagealloc.o \
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health.o mcg.o cq.o srq.o alloc.o qp.o port.o mr.o pd.o \
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mad.o transobj.o vport.o sriov.o fs_cmd.o fs_core.o \
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fs_counters.o rl.o lag.o dev.o
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fs_counters.o rl.o lag.o dev.o lib/gid.o
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mlx5_core-$(CONFIG_MLX5_FPGA) += fpga/cmd.o fpga/core.o
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@ -35,6 +35,7 @@
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#include <linux/mlx5/driver.h>
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#include "mlx5_core.h"
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#include "lib/mlx5.h"
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#include "fpga/core.h"
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static const char *const mlx5_fpga_error_strings[] = {
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@ -104,6 +105,7 @@ int mlx5_fpga_device_start(struct mlx5_core_dev *mdev)
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{
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struct mlx5_fpga_device *fdev = mdev->fpga;
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unsigned long flags;
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unsigned int max_num_qps;
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int err;
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if (!fdev)
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@ -123,6 +125,9 @@ int mlx5_fpga_device_start(struct mlx5_core_dev *mdev)
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mlx5_fpga_image_name(fdev->last_oper_image),
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MLX5_CAP_FPGA(fdev->mdev, image_version));
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max_num_qps = MLX5_CAP_FPGA(mdev, shell_caps.max_num_qps);
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err = mlx5_core_reserve_gids(mdev, max_num_qps);
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out:
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spin_lock_irqsave(&fdev->state_lock, flags);
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fdev->state = err ? MLX5_FPGA_STATUS_FAILURE : MLX5_FPGA_STATUS_SUCCESS;
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@ -151,9 +156,33 @@ int mlx5_fpga_device_init(struct mlx5_core_dev *mdev)
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return 0;
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}
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void mlx5_fpga_device_stop(struct mlx5_core_dev *mdev)
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{
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struct mlx5_fpga_device *fdev = mdev->fpga;
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unsigned int max_num_qps;
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unsigned long flags;
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if (!fdev)
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return;
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spin_lock_irqsave(&fdev->state_lock, flags);
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if (fdev->state != MLX5_FPGA_STATUS_SUCCESS) {
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spin_unlock_irqrestore(&fdev->state_lock, flags);
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return;
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}
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fdev->state = MLX5_FPGA_STATUS_NONE;
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spin_unlock_irqrestore(&fdev->state_lock, flags);
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max_num_qps = MLX5_CAP_FPGA(mdev, shell_caps.max_num_qps);
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mlx5_core_unreserve_gids(mdev, max_num_qps);
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}
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void mlx5_fpga_device_cleanup(struct mlx5_core_dev *mdev)
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{
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kfree(mdev->fpga);
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struct mlx5_fpga_device *fdev = mdev->fpga;
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mlx5_fpga_device_stop(mdev);
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kfree(fdev);
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mdev->fpga = NULL;
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}
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@ -71,6 +71,7 @@ struct mlx5_fpga_device {
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int mlx5_fpga_device_init(struct mlx5_core_dev *mdev);
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void mlx5_fpga_device_cleanup(struct mlx5_core_dev *mdev);
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int mlx5_fpga_device_start(struct mlx5_core_dev *mdev);
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void mlx5_fpga_device_stop(struct mlx5_core_dev *mdev);
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void mlx5_fpga_event(struct mlx5_core_dev *mdev, u8 event, void *data);
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#else
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@ -89,6 +90,10 @@ static inline int mlx5_fpga_device_start(struct mlx5_core_dev *mdev)
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return 0;
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}
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static inline void mlx5_fpga_device_stop(struct mlx5_core_dev *mdev)
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{
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}
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static inline void mlx5_fpga_event(struct mlx5_core_dev *mdev, u8 event,
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void *data)
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{
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154
drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c
Normal file
154
drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c
Normal file
@ -0,0 +1,154 @@
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/*
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* Copyright (c) 2017, Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/mlx5/driver.h>
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#include <linux/etherdevice.h>
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#include <linux/idr.h>
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#include "mlx5_core.h"
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void mlx5_init_reserved_gids(struct mlx5_core_dev *dev)
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{
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unsigned int tblsz = MLX5_CAP_ROCE(dev, roce_address_table_size);
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ida_init(&dev->roce.reserved_gids.ida);
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dev->roce.reserved_gids.start = tblsz;
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dev->roce.reserved_gids.count = 0;
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}
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void mlx5_cleanup_reserved_gids(struct mlx5_core_dev *dev)
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{
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WARN_ON(!ida_is_empty(&dev->roce.reserved_gids.ida));
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dev->roce.reserved_gids.start = 0;
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dev->roce.reserved_gids.count = 0;
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ida_destroy(&dev->roce.reserved_gids.ida);
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}
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int mlx5_core_reserve_gids(struct mlx5_core_dev *dev, unsigned int count)
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{
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if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
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mlx5_core_err(dev, "Cannot reserve GIDs when interfaces are up\n");
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return -EPERM;
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}
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if (dev->roce.reserved_gids.start < count) {
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mlx5_core_warn(dev, "GID table exhausted attempting to reserve %d more GIDs\n",
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count);
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return -ENOMEM;
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}
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if (dev->roce.reserved_gids.count + count > MLX5_MAX_RESERVED_GIDS) {
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mlx5_core_warn(dev, "Unable to reserve %d more GIDs\n", count);
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return -ENOMEM;
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}
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dev->roce.reserved_gids.start -= count;
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dev->roce.reserved_gids.count += count;
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mlx5_core_dbg(dev, "Reserved %u GIDs starting at %u\n",
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dev->roce.reserved_gids.count,
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dev->roce.reserved_gids.start);
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return 0;
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}
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void mlx5_core_unreserve_gids(struct mlx5_core_dev *dev, unsigned int count)
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{
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WARN(test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state), "Unreserving GIDs when interfaces are up");
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WARN(count > dev->roce.reserved_gids.count, "Unreserving %u GIDs when only %u reserved",
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count, dev->roce.reserved_gids.count);
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dev->roce.reserved_gids.start += count;
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dev->roce.reserved_gids.count -= count;
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mlx5_core_dbg(dev, "%u GIDs starting at %u left reserved\n",
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dev->roce.reserved_gids.count,
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dev->roce.reserved_gids.start);
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}
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int mlx5_core_reserved_gid_alloc(struct mlx5_core_dev *dev, int *gid_index)
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{
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int end = dev->roce.reserved_gids.start +
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dev->roce.reserved_gids.count;
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int index = 0;
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index = ida_simple_get(&dev->roce.reserved_gids.ida,
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dev->roce.reserved_gids.start, end,
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GFP_KERNEL);
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if (index < 0)
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return index;
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mlx5_core_dbg(dev, "Allodating reserved GID %u\n", index);
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*gid_index = index;
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return 0;
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}
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void mlx5_core_reserved_gid_free(struct mlx5_core_dev *dev, int gid_index)
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{
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mlx5_core_dbg(dev, "Freeing reserved GID %u\n", gid_index);
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ida_simple_remove(&dev->roce.reserved_gids.ida, gid_index);
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}
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unsigned int mlx5_core_reserved_gids_count(struct mlx5_core_dev *dev)
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{
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return dev->roce.reserved_gids.count;
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}
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EXPORT_SYMBOL_GPL(mlx5_core_reserved_gids_count);
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int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index,
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u8 roce_version, u8 roce_l3_type, const u8 *gid,
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const u8 *mac, bool vlan, u16 vlan_id)
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{
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#define MLX5_SET_RA(p, f, v) MLX5_SET(roce_addr_layout, p, f, v)
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u32 in[MLX5_ST_SZ_DW(set_roce_address_in)] = {0};
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u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0};
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void *in_addr = MLX5_ADDR_OF(set_roce_address_in, in, roce_address);
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char *addr_l3_addr = MLX5_ADDR_OF(roce_addr_layout, in_addr,
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source_l3_address);
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void *addr_mac = MLX5_ADDR_OF(roce_addr_layout, in_addr,
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source_mac_47_32);
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int gidsz = MLX5_FLD_SZ_BYTES(roce_addr_layout, source_l3_address);
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if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
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return -EINVAL;
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if (gid) {
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if (vlan) {
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MLX5_SET_RA(in_addr, vlan_valid, 1);
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MLX5_SET_RA(in_addr, vlan_id, vlan_id);
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}
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ether_addr_copy(addr_mac, mac);
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MLX5_SET_RA(in_addr, roce_version, roce_version);
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MLX5_SET_RA(in_addr, roce_l3_type, roce_l3_type);
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memcpy(addr_l3_addr, gid, gidsz);
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}
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MLX5_SET(set_roce_address_in, in, roce_address_index, index);
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MLX5_SET(set_roce_address_in, in, opcode, MLX5_CMD_OP_SET_ROCE_ADDRESS);
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return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
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}
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EXPORT_SYMBOL(mlx5_core_roce_gid_set);
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43
drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h
Normal file
43
drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h
Normal file
@ -0,0 +1,43 @@
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/*
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* Copyright (c) 2017, Mellanox Technologies, Ltd. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __LIB_MLX5_H__
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#define __LIB_MLX5_H__
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void mlx5_init_reserved_gids(struct mlx5_core_dev *dev);
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void mlx5_cleanup_reserved_gids(struct mlx5_core_dev *dev);
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int mlx5_core_reserve_gids(struct mlx5_core_dev *dev, unsigned int count);
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void mlx5_core_unreserve_gids(struct mlx5_core_dev *dev, unsigned int count);
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int mlx5_core_reserved_gid_alloc(struct mlx5_core_dev *dev, int *gid_index);
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void mlx5_core_reserved_gid_free(struct mlx5_core_dev *dev, int gid_index);
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#endif
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@ -56,6 +56,7 @@
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#ifdef CONFIG_MLX5_CORE_EN
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#include "eswitch.h"
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#endif
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#include "lib/mlx5.h"
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#include "fpga/core.h"
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MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
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@ -936,6 +937,8 @@ static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv)
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mlx5_init_mkey_table(dev);
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mlx5_init_reserved_gids(dev);
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err = mlx5_init_rl_table(dev);
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if (err) {
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dev_err(&pdev->dev, "Failed to init rate limiting\n");
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@ -986,6 +989,7 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *dev)
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mlx5_eswitch_cleanup(dev->priv.eswitch);
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#endif
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mlx5_cleanup_rl_table(dev);
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mlx5_cleanup_reserved_gids(dev);
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mlx5_cleanup_mkey_table(dev);
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mlx5_cleanup_srq_table(dev);
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mlx5_cleanup_qp_table(dev);
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@ -1160,7 +1164,7 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
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err = mlx5_fpga_device_start(dev);
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if (err) {
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dev_err(&pdev->dev, "fpga device start failed %d\n", err);
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goto err_reg_dev;
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goto err_fpga_start;
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}
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if (mlx5_device_registered(dev)) {
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@ -1181,6 +1185,9 @@ out:
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return 0;
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err_reg_dev:
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mlx5_fpga_device_stop(dev);
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err_fpga_start:
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mlx5_sriov_detach(dev);
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err_sriov:
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@ -1260,6 +1267,8 @@ static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
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if (mlx5_device_registered(dev))
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mlx5_detach_device(dev);
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mlx5_fpga_device_stop(dev);
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mlx5_sriov_detach(dev);
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#ifdef CONFIG_MLX5_CORE_EN
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mlx5_eswitch_detach(dev->priv.eswitch);
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@ -44,6 +44,7 @@
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#include <linux/workqueue.h>
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#include <linux/mempool.h>
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#include <linux/interrupt.h>
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#include <linux/idr.h>
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#include <linux/mlx5/device.h>
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#include <linux/mlx5/doorbell.h>
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@ -737,6 +738,14 @@ struct mlx5e_resources {
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struct mlx5_sq_bfreg bfreg;
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};
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#define MLX5_MAX_RESERVED_GIDS 8
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struct mlx5_rsvd_gids {
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unsigned int start;
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unsigned int count;
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struct ida ida;
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};
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struct mlx5_core_dev {
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struct pci_dev *pdev;
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/* sync pci state */
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@ -766,6 +775,9 @@ struct mlx5_core_dev {
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atomic_t num_qps;
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u32 issi;
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struct mlx5e_resources mlx5e_res;
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struct {
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struct mlx5_rsvd_gids reserved_gids;
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} roce;
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#ifdef CONFIG_MLX5_FPGA
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struct mlx5_fpga_device *fpga;
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#endif
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@ -1045,6 +1057,11 @@ int mlx5_alloc_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg,
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bool map_wc, bool fast_path);
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void mlx5_free_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg);
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|
||||
unsigned int mlx5_core_reserved_gids_count(struct mlx5_core_dev *dev);
|
||||
int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index,
|
||||
u8 roce_version, u8 roce_l3_type, const u8 *gid,
|
||||
const u8 *mac, bool vlan, u16 vlan_id);
|
||||
|
||||
static inline int fw_initializing(struct mlx5_core_dev *dev)
|
||||
{
|
||||
return ioread32be(&dev->iseg->initializing) >> 31;
|
||||
|
||||
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Reference in New Issue
Block a user