thermal/drivers/exynos: Use set_trips ops
Currently, each trip point defined in the device tree corresponds to a single hardware interrupt. This commit instead switches to using two hardware interrupts, whose values are set dynamically using the set_trips callback. Additionally, the critical temperature threshold is handled specifically. Setting interrupts in this way also fixes a long-standing lockdep warning, which was caused by calling thermal_zone_get_trips with our lock being held. Do note that this requires TMU initialization to be split into two parts, as done by the parent commit: parts of the initialization call into the thermal_zone_device structure and so must be done after its registration, but the initialization is also responsible for setting up calibration, which must be done before thermal_zone_device registration, which will call set_trips for the first time; if the calibration is not done in time, the interrupt values will be silently wrong! Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20231201095625.301884-10-m.majewski2@samsung.com
This commit is contained in:
Mateusz Majewski
Daniel Lezcano
parent
af00d48833
commit
5314b15437
@ -158,10 +158,12 @@ enum soc_type {
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* in the positive-TC generator block
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* 0 < reference_voltage <= 31
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* @tzd: pointer to thermal_zone_device structure
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* @ntrip: number of supported trip points.
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* @enabled: current status of TMU device
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* @tmu_set_trip_temp: SoC specific method to set trip (rising threshold)
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* @tmu_set_trip_hyst: SoC specific to set hysteresis (falling threshold)
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* @tmu_set_low_temp: SoC specific method to set trip (falling threshold)
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* @tmu_set_high_temp: SoC specific method to set trip (rising threshold)
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* @tmu_set_crit_temp: SoC specific method to set critical temperature
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* @tmu_disable_low: SoC specific method to disable an interrupt (falling threshold)
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* @tmu_disable_high: SoC specific method to disable an interrupt (rising threshold)
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* @tmu_initialize: SoC specific TMU initialization method
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* @tmu_control: SoC specific TMU control method
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* @tmu_read: SoC specific TMU temperature read method
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@ -183,13 +185,13 @@ struct exynos_tmu_data {
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u8 gain;
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u8 reference_voltage;
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struct thermal_zone_device *tzd;
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unsigned int ntrip;
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bool enabled;
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void (*tmu_set_trip_temp)(struct exynos_tmu_data *data, int trip,
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u8 temp);
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void (*tmu_set_trip_hyst)(struct exynos_tmu_data *data, int trip,
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u8 temp, u8 hyst);
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void (*tmu_set_low_temp)(struct exynos_tmu_data *data, u8 temp);
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void (*tmu_set_high_temp)(struct exynos_tmu_data *data, u8 temp);
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void (*tmu_set_crit_temp)(struct exynos_tmu_data *data, u8 temp);
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void (*tmu_disable_low)(struct exynos_tmu_data *data);
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void (*tmu_disable_high)(struct exynos_tmu_data *data);
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void (*tmu_initialize)(struct platform_device *pdev);
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void (*tmu_control)(struct platform_device *pdev, bool on);
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int (*tmu_read)(struct exynos_tmu_data *data);
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@ -279,49 +281,28 @@ static int exynos_thermal_zone_configure(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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struct thermal_zone_device *tzd = data->tzd;
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int i, num_trips = thermal_zone_get_num_trips(tzd);
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int ret = 0, temp;
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int ret, temp;
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ret = thermal_zone_get_crit_temp(tzd, &temp);
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if (ret) {
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/* FIXME: Remove this special case */
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if (data->soc == SOC_ARCH_EXYNOS5433)
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return 0;
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if (ret && data->soc != SOC_ARCH_EXYNOS5433) { /* FIXME */
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dev_err(&pdev->dev,
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"No CRITICAL trip point defined in device tree!\n");
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goto out;
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return ret;
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}
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mutex_lock(&data->lock);
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if (num_trips > data->ntrip) {
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dev_info(&pdev->dev,
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"More trip points than supported by this TMU.\n");
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dev_info(&pdev->dev,
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"%d trip points should be configured in polling mode.\n",
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num_trips - data->ntrip);
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}
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clk_enable(data->clk);
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num_trips = min_t(int, num_trips, data->ntrip);
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data->tmu_set_crit_temp(data, temp / MCELSIUS);
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/* Write temperature code for rising and falling threshold */
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for (i = 0; i < num_trips; i++) {
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struct thermal_trip trip;
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ret = thermal_zone_get_trip(tzd, i, &trip);
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if (ret)
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goto err;
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data->tmu_set_trip_temp(data, i, trip.temperature / MCELSIUS);
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data->tmu_set_trip_hyst(data, i, trip.temperature / MCELSIUS,
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trip.hysteresis / MCELSIUS);
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}
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err:
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clk_disable(data->clk);
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mutex_unlock(&data->lock);
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out:
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return ret;
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return 0;
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}
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static u32 get_con_reg(struct exynos_tmu_data *data, u32 con)
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@ -354,17 +335,74 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on)
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mutex_unlock(&data->lock);
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}
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static void exynos4210_tmu_set_trip_temp(struct exynos_tmu_data *data,
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int trip_id, u8 temp)
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static void exynos_tmu_update_bit(struct exynos_tmu_data *data, int reg_off,
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int bit_off, bool enable)
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{
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temp = temp_to_code(data, temp);
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writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + trip_id * 4);
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u32 interrupt_en;
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interrupt_en = readl(data->base + reg_off);
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if (enable)
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interrupt_en |= BIT(bit_off);
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else
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interrupt_en &= ~BIT(bit_off);
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writel(interrupt_en, data->base + reg_off);
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}
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/* failing thresholds are not supported on Exynos4210 */
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static void exynos4210_tmu_set_trip_hyst(struct exynos_tmu_data *data,
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int trip, u8 temp, u8 hyst)
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static void exynos_tmu_update_temp(struct exynos_tmu_data *data, int reg_off,
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int bit_off, u8 temp)
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{
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u16 tmu_temp_mask;
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u32 th;
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tmu_temp_mask =
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(data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK
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: EXYNOS_TMU_TEMP_MASK;
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th = readl(data->base + reg_off);
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th &= ~(tmu_temp_mask << bit_off);
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th |= temp_to_code(data, temp) << bit_off;
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writel(th, data->base + reg_off);
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}
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static void exynos4210_tmu_set_low_temp(struct exynos_tmu_data *data, u8 temp)
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{
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/*
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* Failing thresholds are not supported on Exynos 4210.
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* We use polling instead.
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*/
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}
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static void exynos4210_tmu_set_high_temp(struct exynos_tmu_data *data, u8 temp)
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{
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temp = temp_to_code(data, temp);
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writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + 4);
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exynos_tmu_update_bit(data, EXYNOS_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_RISE0_SHIFT + 4, true);
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}
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static void exynos4210_tmu_disable_low(struct exynos_tmu_data *data)
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{
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/* Again, this is handled by polling. */
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}
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static void exynos4210_tmu_disable_high(struct exynos_tmu_data *data)
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{
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exynos_tmu_update_bit(data, EXYNOS_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_RISE0_SHIFT + 4, false);
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}
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static void exynos4210_tmu_set_crit_temp(struct exynos_tmu_data *data, u8 temp)
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{
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/*
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* Hardware critical temperature handling is not supported on Exynos 4210.
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* We still set the critical temperature threshold, but this is only to
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* make sure it is handled as soon as possible. It is just a normal interrupt.
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*/
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temp = temp_to_code(data, temp);
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writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + 12);
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exynos_tmu_update_bit(data, EXYNOS_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_RISE0_SHIFT + 12, true);
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}
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static void exynos4210_tmu_initialize(struct platform_device *pdev)
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@ -376,33 +414,31 @@ static void exynos4210_tmu_initialize(struct platform_device *pdev)
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writeb(0, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
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}
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static void exynos4412_tmu_set_trip_temp(struct exynos_tmu_data *data,
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int trip, u8 temp)
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static void exynos4412_tmu_set_low_temp(struct exynos_tmu_data *data, u8 temp)
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{
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u32 th, con;
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th = readl(data->base + EXYNOS_THD_TEMP_RISE);
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th &= ~(0xff << 8 * trip);
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th |= temp_to_code(data, temp) << 8 * trip;
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writel(th, data->base + EXYNOS_THD_TEMP_RISE);
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if (trip == 3) {
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con = readl(data->base + EXYNOS_TMU_REG_CONTROL);
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con |= BIT(EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
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writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
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}
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exynos_tmu_update_temp(data, EXYNOS_THD_TEMP_FALL, 0, temp);
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exynos_tmu_update_bit(data, EXYNOS_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_FALL0_SHIFT, true);
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}
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static void exynos4412_tmu_set_trip_hyst(struct exynos_tmu_data *data,
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int trip, u8 temp, u8 hyst)
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static void exynos4412_tmu_set_high_temp(struct exynos_tmu_data *data, u8 temp)
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{
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u32 th;
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exynos_tmu_update_temp(data, EXYNOS_THD_TEMP_RISE, 8, temp);
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exynos_tmu_update_bit(data, EXYNOS_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_RISE0_SHIFT + 4, true);
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}
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th = readl(data->base + EXYNOS_THD_TEMP_FALL);
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th &= ~(0xff << 8 * trip);
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if (hyst)
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th |= temp_to_code(data, temp - hyst) << 8 * trip;
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writel(th, data->base + EXYNOS_THD_TEMP_FALL);
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static void exynos4412_tmu_disable_low(struct exynos_tmu_data *data)
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{
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exynos_tmu_update_bit(data, EXYNOS_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_FALL0_SHIFT, false);
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}
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static void exynos4412_tmu_set_crit_temp(struct exynos_tmu_data *data, u8 temp)
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{
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exynos_tmu_update_temp(data, EXYNOS_THD_TEMP_RISE, 24, temp);
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exynos_tmu_update_bit(data, EXYNOS_TMU_REG_CONTROL,
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EXYNOS_TMU_THERM_TRIP_EN_SHIFT, true);
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}
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static void exynos4412_tmu_initialize(struct platform_device *pdev)
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@ -432,44 +468,39 @@ static void exynos4412_tmu_initialize(struct platform_device *pdev)
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sanitize_temp_error(data, trim_info);
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}
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static void exynos5433_tmu_set_trip_temp(struct exynos_tmu_data *data,
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int trip, u8 temp)
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static void exynos5433_tmu_set_low_temp(struct exynos_tmu_data *data, u8 temp)
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{
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unsigned int reg_off, j;
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u32 th;
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if (trip > 3) {
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reg_off = EXYNOS5433_THD_TEMP_RISE7_4;
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j = trip - 4;
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} else {
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reg_off = EXYNOS5433_THD_TEMP_RISE3_0;
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j = trip;
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}
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th = readl(data->base + reg_off);
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th &= ~(0xff << j * 8);
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th |= (temp_to_code(data, temp) << j * 8);
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writel(th, data->base + reg_off);
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exynos_tmu_update_temp(data, EXYNOS5433_THD_TEMP_FALL3_0, 0, temp);
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exynos_tmu_update_bit(data, EXYNOS5433_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_FALL0_SHIFT, true);
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}
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static void exynos5433_tmu_set_trip_hyst(struct exynos_tmu_data *data,
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int trip, u8 temp, u8 hyst)
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static void exynos5433_tmu_set_high_temp(struct exynos_tmu_data *data, u8 temp)
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{
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unsigned int reg_off, j;
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u32 th;
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exynos_tmu_update_temp(data, EXYNOS5433_THD_TEMP_RISE3_0, 8, temp);
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exynos_tmu_update_bit(data, EXYNOS5433_TMU_REG_INTEN,
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EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, true);
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}
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if (trip > 3) {
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reg_off = EXYNOS5433_THD_TEMP_FALL7_4;
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j = trip - 4;
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} else {
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reg_off = EXYNOS5433_THD_TEMP_FALL3_0;
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j = trip;
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}
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static void exynos5433_tmu_disable_low(struct exynos_tmu_data *data)
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{
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exynos_tmu_update_bit(data, EXYNOS5433_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_FALL0_SHIFT, false);
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}
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th = readl(data->base + reg_off);
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th &= ~(0xff << j * 8);
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th |= (temp_to_code(data, temp - hyst) << j * 8);
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writel(th, data->base + reg_off);
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static void exynos5433_tmu_disable_high(struct exynos_tmu_data *data)
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{
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exynos_tmu_update_bit(data, EXYNOS5433_TMU_REG_INTEN,
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EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, false);
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}
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static void exynos5433_tmu_set_crit_temp(struct exynos_tmu_data *data, u8 temp)
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{
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exynos_tmu_update_temp(data, EXYNOS5433_THD_TEMP_RISE7_4, 24, temp);
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exynos_tmu_update_bit(data, EXYNOS_TMU_REG_CONTROL,
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EXYNOS_TMU_THERM_TRIP_EN_SHIFT, true);
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exynos_tmu_update_bit(data, EXYNOS5433_TMU_REG_INTEN,
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EXYNOS7_TMU_INTEN_RISE0_SHIFT + 7, true);
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}
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static void exynos5433_tmu_initialize(struct platform_device *pdev)
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@ -505,34 +536,41 @@ static void exynos5433_tmu_initialize(struct platform_device *pdev)
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cal_type ? 2 : 1);
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}
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static void exynos7_tmu_set_trip_temp(struct exynos_tmu_data *data,
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int trip, u8 temp)
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static void exynos7_tmu_set_low_temp(struct exynos_tmu_data *data, u8 temp)
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{
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unsigned int reg_off, bit_off;
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u32 th;
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reg_off = ((7 - trip) / 2) * 4;
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bit_off = ((8 - trip) % 2);
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th = readl(data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
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th &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
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th |= temp_to_code(data, temp) << (16 * bit_off);
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writel(th, data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
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exynos_tmu_update_temp(data, EXYNOS7_THD_TEMP_FALL7_6 + 12, 0, temp);
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exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_FALL0_SHIFT + 0, true);
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}
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static void exynos7_tmu_set_trip_hyst(struct exynos_tmu_data *data,
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int trip, u8 temp, u8 hyst)
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static void exynos7_tmu_set_high_temp(struct exynos_tmu_data *data, u8 temp)
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{
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unsigned int reg_off, bit_off;
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u32 th;
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exynos_tmu_update_temp(data, EXYNOS7_THD_TEMP_RISE7_6 + 12, 16, temp);
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exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN,
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EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, true);
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}
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reg_off = ((7 - trip) / 2) * 4;
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bit_off = ((8 - trip) % 2);
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static void exynos7_tmu_disable_low(struct exynos_tmu_data *data)
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{
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exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN,
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EXYNOS_TMU_INTEN_FALL0_SHIFT + 0, false);
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}
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th = readl(data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
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th &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
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th |= temp_to_code(data, temp - hyst) << (16 * bit_off);
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writel(th, data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
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static void exynos7_tmu_disable_high(struct exynos_tmu_data *data)
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{
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exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN,
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EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, false);
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}
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static void exynos7_tmu_set_crit_temp(struct exynos_tmu_data *data, u8 temp)
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{
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/*
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* Like Exynos 4210, Exynos 7 does not seem to support critical temperature
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* handling in hardware. Again, we still set a separate interrupt for it.
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*/
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exynos_tmu_update_temp(data, EXYNOS7_THD_TEMP_RISE7_6 + 0, 16, temp);
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exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN,
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EXYNOS7_TMU_INTEN_RISE0_SHIFT + 7, true);
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}
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||||
|
||||
static void exynos7_tmu_initialize(struct platform_device *pdev)
|
||||
@ -547,87 +585,44 @@ static void exynos7_tmu_initialize(struct platform_device *pdev)
|
||||
static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
|
||||
{
|
||||
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
||||
struct thermal_zone_device *tz = data->tzd;
|
||||
struct thermal_trip trip;
|
||||
unsigned int con, interrupt_en = 0, i;
|
||||
unsigned int con;
|
||||
|
||||
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
|
||||
|
||||
if (on) {
|
||||
for (i = 0; i < data->ntrip; i++) {
|
||||
if (thermal_zone_get_trip(tz, i, &trip))
|
||||
continue;
|
||||
|
||||
interrupt_en |=
|
||||
BIT(EXYNOS_TMU_INTEN_RISE0_SHIFT + i * 4);
|
||||
}
|
||||
|
||||
if (data->soc != SOC_ARCH_EXYNOS4210)
|
||||
interrupt_en |=
|
||||
interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
|
||||
|
||||
if (on)
|
||||
con |= BIT(EXYNOS_TMU_CORE_EN_SHIFT);
|
||||
} else {
|
||||
else
|
||||
con &= ~BIT(EXYNOS_TMU_CORE_EN_SHIFT);
|
||||
}
|
||||
|
||||
writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
|
||||
writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
|
||||
}
|
||||
|
||||
static void exynos5433_tmu_control(struct platform_device *pdev, bool on)
|
||||
{
|
||||
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
||||
struct thermal_zone_device *tz = data->tzd;
|
||||
struct thermal_trip trip;
|
||||
unsigned int con, interrupt_en = 0, pd_det_en, i;
|
||||
unsigned int con, pd_det_en;
|
||||
|
||||
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
|
||||
|
||||
if (on) {
|
||||
for (i = 0; i < data->ntrip; i++) {
|
||||
if (thermal_zone_get_trip(tz, i, &trip))
|
||||
continue;
|
||||
|
||||
interrupt_en |=
|
||||
BIT(EXYNOS7_TMU_INTEN_RISE0_SHIFT + i);
|
||||
}
|
||||
|
||||
interrupt_en |=
|
||||
interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
|
||||
|
||||
if (on)
|
||||
con |= BIT(EXYNOS_TMU_CORE_EN_SHIFT);
|
||||
} else
|
||||
else
|
||||
con &= ~BIT(EXYNOS_TMU_CORE_EN_SHIFT);
|
||||
|
||||
pd_det_en = on ? EXYNOS5433_PD_DET_EN : 0;
|
||||
|
||||
writel(pd_det_en, data->base + EXYNOS5433_TMU_PD_DET_EN);
|
||||
writel(interrupt_en, data->base + EXYNOS5433_TMU_REG_INTEN);
|
||||
writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
|
||||
}
|
||||
|
||||
static void exynos7_tmu_control(struct platform_device *pdev, bool on)
|
||||
{
|
||||
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
||||
struct thermal_zone_device *tz = data->tzd;
|
||||
struct thermal_trip trip;
|
||||
unsigned int con, interrupt_en = 0, i;
|
||||
unsigned int con;
|
||||
|
||||
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
|
||||
|
||||
if (on) {
|
||||
for (i = 0; i < data->ntrip; i++) {
|
||||
if (thermal_zone_get_trip(tz, i, &trip))
|
||||
continue;
|
||||
|
||||
interrupt_en |=
|
||||
BIT(EXYNOS7_TMU_INTEN_RISE0_SHIFT + i);
|
||||
}
|
||||
|
||||
interrupt_en |=
|
||||
interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
|
||||
|
||||
con |= BIT(EXYNOS_TMU_CORE_EN_SHIFT);
|
||||
con |= BIT(EXYNOS7_PD_DET_EN_SHIFT);
|
||||
} else {
|
||||
@ -635,7 +630,6 @@ static void exynos7_tmu_control(struct platform_device *pdev, bool on)
|
||||
con &= ~BIT(EXYNOS7_PD_DET_EN_SHIFT);
|
||||
}
|
||||
|
||||
writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN);
|
||||
writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
|
||||
}
|
||||
|
||||
@ -873,13 +867,15 @@ static int exynos_map_dt_data(struct platform_device *pdev)
|
||||
|
||||
switch (data->soc) {
|
||||
case SOC_ARCH_EXYNOS4210:
|
||||
data->tmu_set_trip_temp = exynos4210_tmu_set_trip_temp;
|
||||
data->tmu_set_trip_hyst = exynos4210_tmu_set_trip_hyst;
|
||||
data->tmu_set_low_temp = exynos4210_tmu_set_low_temp;
|
||||
data->tmu_set_high_temp = exynos4210_tmu_set_high_temp;
|
||||
data->tmu_disable_low = exynos4210_tmu_disable_low;
|
||||
data->tmu_disable_high = exynos4210_tmu_disable_high;
|
||||
data->tmu_set_crit_temp = exynos4210_tmu_set_crit_temp;
|
||||
data->tmu_initialize = exynos4210_tmu_initialize;
|
||||
data->tmu_control = exynos4210_tmu_control;
|
||||
data->tmu_read = exynos4210_tmu_read;
|
||||
data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
|
||||
data->ntrip = 4;
|
||||
data->gain = 15;
|
||||
data->reference_voltage = 7;
|
||||
data->efuse_value = 55;
|
||||
@ -892,14 +888,16 @@ static int exynos_map_dt_data(struct platform_device *pdev)
|
||||
case SOC_ARCH_EXYNOS5260:
|
||||
case SOC_ARCH_EXYNOS5420:
|
||||
case SOC_ARCH_EXYNOS5420_TRIMINFO:
|
||||
data->tmu_set_trip_temp = exynos4412_tmu_set_trip_temp;
|
||||
data->tmu_set_trip_hyst = exynos4412_tmu_set_trip_hyst;
|
||||
data->tmu_set_low_temp = exynos4412_tmu_set_low_temp;
|
||||
data->tmu_set_high_temp = exynos4412_tmu_set_high_temp;
|
||||
data->tmu_disable_low = exynos4412_tmu_disable_low;
|
||||
data->tmu_disable_high = exynos4210_tmu_disable_high;
|
||||
data->tmu_set_crit_temp = exynos4412_tmu_set_crit_temp;
|
||||
data->tmu_initialize = exynos4412_tmu_initialize;
|
||||
data->tmu_control = exynos4210_tmu_control;
|
||||
data->tmu_read = exynos4412_tmu_read;
|
||||
data->tmu_set_emulation = exynos4412_tmu_set_emulation;
|
||||
data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
|
||||
data->ntrip = 4;
|
||||
data->gain = 8;
|
||||
data->reference_voltage = 16;
|
||||
data->efuse_value = 55;
|
||||
@ -911,14 +909,16 @@ static int exynos_map_dt_data(struct platform_device *pdev)
|
||||
data->max_efuse_value = 100;
|
||||
break;
|
||||
case SOC_ARCH_EXYNOS5433:
|
||||
data->tmu_set_trip_temp = exynos5433_tmu_set_trip_temp;
|
||||
data->tmu_set_trip_hyst = exynos5433_tmu_set_trip_hyst;
|
||||
data->tmu_set_low_temp = exynos5433_tmu_set_low_temp;
|
||||
data->tmu_set_high_temp = exynos5433_tmu_set_high_temp;
|
||||
data->tmu_disable_low = exynos5433_tmu_disable_low;
|
||||
data->tmu_disable_high = exynos5433_tmu_disable_high;
|
||||
data->tmu_set_crit_temp = exynos5433_tmu_set_crit_temp;
|
||||
data->tmu_initialize = exynos5433_tmu_initialize;
|
||||
data->tmu_control = exynos5433_tmu_control;
|
||||
data->tmu_read = exynos4412_tmu_read;
|
||||
data->tmu_set_emulation = exynos4412_tmu_set_emulation;
|
||||
data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
|
||||
data->ntrip = 8;
|
||||
data->gain = 8;
|
||||
if (res.start == EXYNOS5433_G3D_BASE)
|
||||
data->reference_voltage = 23;
|
||||
@ -929,14 +929,16 @@ static int exynos_map_dt_data(struct platform_device *pdev)
|
||||
data->max_efuse_value = 150;
|
||||
break;
|
||||
case SOC_ARCH_EXYNOS7:
|
||||
data->tmu_set_trip_temp = exynos7_tmu_set_trip_temp;
|
||||
data->tmu_set_trip_hyst = exynos7_tmu_set_trip_hyst;
|
||||
data->tmu_set_low_temp = exynos7_tmu_set_low_temp;
|
||||
data->tmu_set_high_temp = exynos7_tmu_set_high_temp;
|
||||
data->tmu_disable_low = exynos7_tmu_disable_low;
|
||||
data->tmu_disable_high = exynos7_tmu_disable_high;
|
||||
data->tmu_set_crit_temp = exynos7_tmu_set_crit_temp;
|
||||
data->tmu_initialize = exynos7_tmu_initialize;
|
||||
data->tmu_control = exynos7_tmu_control;
|
||||
data->tmu_read = exynos7_tmu_read;
|
||||
data->tmu_set_emulation = exynos4412_tmu_set_emulation;
|
||||
data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
|
||||
data->ntrip = 8;
|
||||
data->gain = 9;
|
||||
data->reference_voltage = 17;
|
||||
data->efuse_value = 75;
|
||||
@ -972,9 +974,32 @@ static int exynos_map_dt_data(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int exynos_set_trips(struct thermal_zone_device *tz, int low, int high)
|
||||
{
|
||||
struct exynos_tmu_data *data = thermal_zone_device_priv(tz);
|
||||
|
||||
mutex_lock(&data->lock);
|
||||
clk_enable(data->clk);
|
||||
|
||||
if (low > INT_MIN)
|
||||
data->tmu_set_low_temp(data, low / MCELSIUS);
|
||||
else
|
||||
data->tmu_disable_low(data);
|
||||
if (high < INT_MAX)
|
||||
data->tmu_set_high_temp(data, high / MCELSIUS);
|
||||
else
|
||||
data->tmu_disable_high(data);
|
||||
|
||||
clk_disable(data->clk);
|
||||
mutex_unlock(&data->lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct thermal_zone_device_ops exynos_sensor_ops = {
|
||||
.get_temp = exynos_get_temp,
|
||||
.set_emul_temp = exynos_tmu_set_emulation,
|
||||
.set_trips = exynos_set_trips,
|
||||
};
|
||||
|
||||
static int exynos_tmu_probe(struct platform_device *pdev)
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user