reset: meson: add dt-bindings for meson-axg audio arb
Add dt-bindings for the audio memory arbiter found on Amlogic's A113 based SoCs Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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* Amlogic audio memory arbiter controller
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The Amlogic Audio ARB is a simple device which enables or
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disables the access of Audio FIFOs to DDR on AXG based SoC.
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Required properties:
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- compatible: 'amlogic,meson-axg-audio-arb'
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- reg: physical base address of the controller and length of memory
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mapped region.
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- clocks: phandle to the fifo peripheral clock provided by the audio
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clock controller.
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- #reset-cells: must be 1.
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Example on the A113 SoC:
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arb: reset-controller@280 {
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compatible = "amlogic,meson-axg-audio-arb";
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reg = <0x0 0x280 0x0 0x4>;
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#reset-cells = <1>;
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clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
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};
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include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
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include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
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*
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* Copyright (c) 2018 Baylibre SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
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#define _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
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#define AXG_ARB_TODDR_A 0
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#define AXG_ARB_TODDR_B 1
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#define AXG_ARB_TODDR_C 2
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#define AXG_ARB_FRDDR_A 3
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#define AXG_ARB_FRDDR_B 4
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#define AXG_ARB_FRDDR_C 5
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#endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */
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