reset: meson: add dt-bindings for meson-axg audio arb

Add dt-bindings for the audio memory arbiter found on Amlogic's
A113 based SoCs

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Jerome Brunet 2018-07-20 17:26:32 +02:00 committed by Philipp Zabel
parent 6b39fd590a
commit 5338073561
2 changed files with 38 additions and 0 deletions

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* Amlogic audio memory arbiter controller
The Amlogic Audio ARB is a simple device which enables or
disables the access of Audio FIFOs to DDR on AXG based SoC.
Required properties:
- compatible: 'amlogic,meson-axg-audio-arb'
- reg: physical base address of the controller and length of memory
mapped region.
- clocks: phandle to the fifo peripheral clock provided by the audio
clock controller.
- #reset-cells: must be 1.
Example on the A113 SoC:
arb: reset-controller@280 {
compatible = "amlogic,meson-axg-audio-arb";
reg = <0x0 0x280 0x0 0x4>;
#reset-cells = <1>;
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
};

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/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
*
* Copyright (c) 2018 Baylibre SAS.
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
#define _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
#define AXG_ARB_TODDR_A 0
#define AXG_ARB_TODDR_B 1
#define AXG_ARB_TODDR_C 2
#define AXG_ARB_FRDDR_A 3
#define AXG_ARB_FRDDR_B 4
#define AXG_ARB_FRDDR_C 5
#endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */