clk:gcc-msm8916: add missing mss_q6_bimc_axi clock
This clock is required for loading the qdsp firmware. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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4c9f242203
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@ -2590,6 +2590,23 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = {
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},
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};
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static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
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.halt_reg = 0x49004,
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.clkr = {
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.enable_reg = 0x49004,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "gcc_mss_q6_bimc_axi_clk",
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.parent_names = (const char *[]){
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"bimc_ddr_clk_src",
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch gcc_oxili_ahb_clk = {
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.halt_reg = 0x59028,
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.clkr = {
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@ -3227,6 +3244,7 @@ static struct clk_regmap *gcc_msm8916_clocks[] = {
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[GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK] = &gcc_ultaudio_lpaif_sec_i2s_clk.clkr,
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[GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK] = &gcc_ultaudio_lpaif_aux_i2s_clk.clkr,
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[GCC_CODEC_DIGCODEC_CLK] = &gcc_codec_digcodec_clk.clkr,
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[GCC_MSS_Q6_BIMC_AXI_CLK] = &gcc_mss_q6_bimc_axi_clk.clkr,
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};
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static struct gdsc *gcc_msm8916_gdscs[] = {
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@ -174,6 +174,7 @@
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#define GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK 157
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#define GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK 158
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#define GCC_CODEC_DIGCODEC_CLK 159
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#define GCC_MSS_Q6_BIMC_AXI_CLK 160
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/* Indexes for GDSCs */
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#define BIMC_GDSC 0
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