ravb: Move maximum Rx descriptor data usage to info struct
To make it possible to merge the R-Car and RZ/G2L code paths move the maximum usable size of a single Rx descriptor data slice into the hardware information instead of using two different defines in the two different code paths. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1015,10 +1015,6 @@ enum CSR2_BIT {
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#define NUM_RX_QUEUE 2
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#define NUM_TX_QUEUE 2
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#define RX_BUF_SZ (2048 - ETH_FCS_LEN + sizeof(__sum16))
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#define GBETH_RX_DESC_DATA_SIZE 4080
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struct ravb_tstamp_skb {
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struct list_head list;
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struct sk_buff *skb;
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@ -1058,6 +1054,7 @@ struct ravb_hw_info {
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int stats_len;
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u32 tccr_mask;
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u32 rx_max_frame_size;
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u32 rx_max_desc_use;
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unsigned aligned_tx: 1;
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/* hardware features */
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@ -351,7 +351,7 @@ static void ravb_rx_ring_format_gbeth(struct net_device *ndev, int q)
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for (i = 0; i < priv->num_rx_ring[q]; i++) {
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/* RX descriptor */
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rx_desc = &priv->rx_ring[q].desc[i];
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rx_desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE);
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rx_desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use);
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dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data,
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priv->info->rx_max_frame_size,
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DMA_FROM_DEVICE);
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@ -381,7 +381,7 @@ static void ravb_rx_ring_format_rcar(struct net_device *ndev, int q)
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for (i = 0; i < priv->num_rx_ring[q]; i++) {
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/* RX descriptor */
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rx_desc = &priv->rx_ring[q].ex_desc[i];
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rx_desc->ds_cc = cpu_to_le16(RX_BUF_SZ);
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rx_desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use);
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dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data,
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priv->info->rx_max_frame_size,
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DMA_FROM_DEVICE);
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@ -921,7 +921,7 @@ static bool ravb_rx_gbeth(struct net_device *ndev, int *quota, int q)
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for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) {
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entry = priv->dirty_rx[q] % priv->num_rx_ring[q];
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desc = &priv->rx_ring[q].desc[entry];
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desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE);
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desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use);
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if (!priv->rx_skb[q][entry]) {
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skb = ravb_alloc_skb(ndev, info, GFP_ATOMIC);
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@ -1036,7 +1036,7 @@ static bool ravb_rx_rcar(struct net_device *ndev, int *quota, int q)
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for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) {
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entry = priv->dirty_rx[q] % priv->num_rx_ring[q];
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desc = &priv->rx_ring[q].ex_desc[entry];
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desc->ds_cc = cpu_to_le16(RX_BUF_SZ);
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desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use);
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if (!priv->rx_skb[q][entry]) {
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skb = ravb_alloc_skb(ndev, info, GFP_ATOMIC);
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@ -2694,6 +2694,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = {
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.stats_len = ARRAY_SIZE(ravb_gstrings_stats),
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.tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
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.rx_max_frame_size = SZ_2K,
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.rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16),
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.internal_delay = 1,
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.tx_counters = 1,
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.multi_irqs = 1,
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@ -2719,6 +2720,7 @@ static const struct ravb_hw_info ravb_gen2_hw_info = {
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.stats_len = ARRAY_SIZE(ravb_gstrings_stats),
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.tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
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.rx_max_frame_size = SZ_2K,
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.rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16),
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.aligned_tx = 1,
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.gptp = 1,
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.nc_queues = 1,
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@ -2741,6 +2743,7 @@ static const struct ravb_hw_info ravb_rzv2m_hw_info = {
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.stats_len = ARRAY_SIZE(ravb_gstrings_stats),
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.tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
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.rx_max_frame_size = SZ_2K,
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.rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16),
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.multi_irqs = 1,
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.err_mgmt_irqs = 1,
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.gptp = 1,
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@ -2765,6 +2768,7 @@ static const struct ravb_hw_info gbeth_hw_info = {
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.stats_len = ARRAY_SIZE(ravb_gstrings_stats_gbeth),
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.tccr_mask = TCCR_TSRQ0,
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.rx_max_frame_size = SZ_8K,
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.rx_max_desc_use = 4080,
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.aligned_tx = 1,
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.tx_counters = 1,
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.carrier_counters = 1,
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