arm64: dts: rockchip: Fix the num-lanes of pcie3x4 on Cool Pi CM5 EVB
The 4 lane pcie30 phy is shared by pcie3x4 and pcie3x2, so the num-lanes of pcie3x4 should be 2. Fixes: 791c154c3982 ("arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB") Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20240201121106.1471301-4-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -114,6 +114,7 @@
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status = "okay";
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};
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/* Standard pcie */
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&pcie3x2 {
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reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_sys>;
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@ -122,6 +123,7 @@
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/* M.2 M-Key ssd */
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&pcie3x4 {
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num-lanes = <2>;
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reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_sys>;
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status = "okay";
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