arm64: dts: rockchip: Fix the num-lanes of pcie3x4 on Cool Pi CM5 EVB

The 4 lane pcie30 phy is shared by pcie3x4 and pcie3x2, so
the num-lanes of pcie3x4 should be 2.

Fixes: 791c154c3982 ("arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB")
Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20240201121106.1471301-4-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Andy Yan 2024-02-01 20:11:06 +08:00 committed by Heiko Stuebner
parent c7e8dbb3bc
commit 5556a8c3af

View File

@ -114,6 +114,7 @@
status = "okay";
};
/* Standard pcie */
&pcie3x2 {
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_sys>;
@ -122,6 +123,7 @@
/* M.2 M-Key ssd */
&pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_sys>;
status = "okay";