ARM: dts: iwg22d-sodimm: Enable SGTL5000 audio codec
This patch enables SGTL5000 audio codec on the carrier board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -26,6 +26,12 @@
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stdout-path = "serial3:115200n8";
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stdout-path = "serial3:115200n8";
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};
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};
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audio_clock: audio_clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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compatible = "regulator-gpio";
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@ -80,6 +86,23 @@
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pinctrl-names = "default";
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pinctrl-names = "default";
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};
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};
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&i2c5 {
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pinctrl-0 = <&i2c5_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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sgtl5000: codec@a {
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compatible = "fsl,sgtl5000";
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#sound-dai-cells = <0>;
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reg = <0x0a>;
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clocks = <&audio_clock>;
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VDDA-supply = <®_3p3v>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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&pci1 {
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&pci1 {
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status = "okay";
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status = "okay";
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pinctrl-0 = <&usb1_pins>;
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pinctrl-0 = <&usb1_pins>;
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@ -102,6 +125,11 @@
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function = "hscif1";
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function = "hscif1";
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};
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};
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i2c5_pins: i2c5 {
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groups = "i2c5_b";
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function = "i2c5";
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};
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scif4_pins: scif4 {
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scif4_pins: scif4 {
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groups = "scif4_data_b";
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groups = "scif4_data_b";
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function = "scif4";
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function = "scif4";
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