- Fix a problem with the imx28 ECC engine
- Remove a debug trace introduced in2b6f0090a3
("mtd: Check add_mtd_device() ret code") - Make sure partitions of size 0 can be registered - Fix kernel-doc warning in the rawnand core - Fix the error path of spinand_init() (missing manufacturer cleanup in a few places) - Address a problem with the SPI NAND PROGRAM LOAD operation which does not work as expected on some parts. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcXqZKAAoJEGXtNgF+CLcA01sQAJSSf/dnaie76vt9icUezM7b ulHdnGJEDazEYj5aIbFbT8S8TMpPA8FRR1zOsW1DbNA+khw82p8n2wykFzl2IYHh /qWzWcNGhr/s1tTwdS4lpR+lOyKJ3izk+AkL/vYwK1XlHu8uR+1/uazEiE/qNSKO grq+jIy5z5n8iVyhd6vjKumbkmWQlueTLVLGWyQeFIlSxYXyig1x3xhcvCcSBmGL +LpO+vB8T7G60nOAN5MTM0SDEoeg3R6clKeWWbVfZ5tkFoD8SvXagn3fYHIA6lDA pqGWUk6/HmUxec3DxLYZqfoaqi9b3u182H5sY6gOKApPF0HiBGJslo/tiplfnZVe 3cKm2Mf+LJ4fkqdmCT/UcSm6GuP19CF0rSWPW9Xdq2jgOr5RJ5FlUWAucqM0QPmp q3LfQIiwegHh0PQ2dRPAFG1J6btnCxX+pnitNwskbU9XbnDvpPWnaUHcg/qXwhTt nImdqBr401d+bv9NgiPSgTQPltmSPZ1t+SI8AE6G1tdzarB2KQ0tOQL+CCMftGZ0 /+eEY1+U05JrWzJhn7VnqszkNy9kvcszWqVkxomw+ZWQiiN7Nboaadzh/TJ8Sxog lOg3EGU3BWBSG3gD/G6v4DuuK9RpKuIzxBP/7ROJJsJRM9N+I4iI1babPdTVbUc0 MX70tM0a9R5/y0EscaK0 =QL6/ -----END PGP SIGNATURE----- Merge tag 'mtd/fixes-for-5.0-rc6' of git://git.infradead.org/linux-mtd Pull mtd fixes from Boris Brezillon: - Fix a problem with the imx28 ECC engine - Remove a debug trace introduced in2b6f0090a3
("mtd: Check add_mtd_device() ret code") - Make sure partitions of size 0 can be registered - Fix kernel-doc warning in the rawnand core - Fix the error path of spinand_init() (missing manufacturer cleanup in a few places) - Address a problem with the SPI NAND PROGRAM LOAD operation which does not work as expected on some parts. * tag 'mtd/fixes-for-5.0-rc6' of git://git.infradead.org/linux-mtd: mtd: rawnand: gpmi: fix MX28 bus master lockup problem mtd: Make sure mtd->erasesize is valid even if the partition is of size 0 mtd: Remove a debug trace in mtdpart.c mtd: rawnand: fix kernel-doc warnings mtd: spinand: Fix the error/cleanup path in spinand_init() mtd: spinand: Handle the case where PROGRAM LOAD does not reset the cache
This commit is contained in:
commit
5610789ad0
@ -480,6 +480,10 @@ static struct mtd_part *allocate_partition(struct mtd_info *parent,
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/* let's register it anyway to preserve ordering */
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slave->offset = 0;
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slave->mtd.size = 0;
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/* Initialize ->erasesize to make add_mtd_device() happy. */
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slave->mtd.erasesize = parent->erasesize;
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printk(KERN_ERR"mtd: partition \"%s\" is out of reach -- disabled\n",
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part->name);
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goto out_register;
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@ -632,7 +636,6 @@ err_remove_part:
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mutex_unlock(&mtd_partitions_mutex);
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free_partition(new);
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pr_info("%s:%i\n", __func__, __LINE__);
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return ret;
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}
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@ -155,9 +155,10 @@ int gpmi_init(struct gpmi_nand_data *this)
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/*
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* Reset BCH here, too. We got failures otherwise :(
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* See later BCH reset for explanation of MX23 handling
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* See later BCH reset for explanation of MX23 and MX28 handling
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*/
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ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MX23(this));
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ret = gpmi_reset_block(r->bch_regs,
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GPMI_IS_MX23(this) || GPMI_IS_MX28(this));
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if (ret)
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goto err_out;
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@ -263,12 +264,10 @@ int bch_set_geometry(struct gpmi_nand_data *this)
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/*
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* Due to erratum #2847 of the MX23, the BCH cannot be soft reset on this
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* chip, otherwise it will lock up. So we skip resetting BCH on the MX23.
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* On the other hand, the MX28 needs the reset, because one case has been
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* seen where the BCH produced ECC errors constantly after 10000
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* consecutive reboots. The latter case has not been seen on the MX23
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* yet, still we don't know if it could happen there as well.
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* and MX28.
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*/
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ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MX23(this));
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ret = gpmi_reset_block(r->bch_regs,
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GPMI_IS_MX23(this) || GPMI_IS_MX28(this));
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if (ret)
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goto err_out;
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@ -410,6 +410,7 @@ static int nand_check_wp(struct nand_chip *chip)
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/**
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* nand_fill_oob - [INTERN] Transfer client buffer to oob
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* @chip: NAND chip object
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* @oob: oob data buffer
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* @len: oob data write length
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* @ops: oob ops structure
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@ -158,7 +158,7 @@ static u32 add_marker_len(struct nand_bbt_descr *td)
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/**
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* read_bbt - [GENERIC] Read the bad block table starting from page
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* @chip: NAND chip object
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* @this: NAND chip object
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* @buf: temporary buffer
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* @page: the starting page
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* @num: the number of bbt descriptors to read
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@ -304,24 +304,30 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand,
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struct nand_device *nand = spinand_to_nand(spinand);
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struct mtd_info *mtd = nanddev_to_mtd(nand);
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struct nand_page_io_req adjreq = *req;
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unsigned int nbytes = 0;
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void *buf = NULL;
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void *buf = spinand->databuf;
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unsigned int nbytes;
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u16 column = 0;
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int ret;
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memset(spinand->databuf, 0xff,
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nanddev_page_size(nand) +
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nanddev_per_page_oobsize(nand));
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/*
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* Looks like PROGRAM LOAD (AKA write cache) does not necessarily reset
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* the cache content to 0xFF (depends on vendor implementation), so we
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* must fill the page cache entirely even if we only want to program
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* the data portion of the page, otherwise we might corrupt the BBM or
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* user data previously programmed in OOB area.
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*/
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nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand);
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memset(spinand->databuf, 0xff, nbytes);
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adjreq.dataoffs = 0;
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adjreq.datalen = nanddev_page_size(nand);
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adjreq.databuf.out = spinand->databuf;
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adjreq.ooblen = nanddev_per_page_oobsize(nand);
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adjreq.ooboffs = 0;
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adjreq.oobbuf.out = spinand->oobbuf;
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if (req->datalen) {
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if (req->datalen)
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memcpy(spinand->databuf + req->dataoffs, req->databuf.out,
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req->datalen);
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adjreq.dataoffs = 0;
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adjreq.datalen = nanddev_page_size(nand);
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adjreq.databuf.out = spinand->databuf;
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nbytes = adjreq.datalen;
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buf = spinand->databuf;
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}
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if (req->ooblen) {
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if (req->mode == MTD_OPS_AUTO_OOB)
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@ -332,14 +338,6 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand,
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else
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memcpy(spinand->oobbuf + req->ooboffs, req->oobbuf.out,
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req->ooblen);
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adjreq.ooblen = nanddev_per_page_oobsize(nand);
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adjreq.ooboffs = 0;
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nbytes += nanddev_per_page_oobsize(nand);
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if (!buf) {
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buf = spinand->oobbuf;
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column = nanddev_page_size(nand);
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}
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}
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spinand_cache_op_adjust_colum(spinand, &adjreq, &column);
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@ -370,8 +368,8 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand,
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/*
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* We need to use the RANDOM LOAD CACHE operation if there's
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* more than one iteration, because the LOAD operation resets
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* the cache to 0xff.
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* more than one iteration, because the LOAD operation might
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* reset the cache to 0xff.
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*/
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if (nbytes) {
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column = op.addr.val;
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@ -1018,11 +1016,11 @@ static int spinand_init(struct spinand_device *spinand)
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for (i = 0; i < nand->memorg.ntargets; i++) {
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ret = spinand_select_target(spinand, i);
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if (ret)
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goto err_free_bufs;
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goto err_manuf_cleanup;
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ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED);
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if (ret)
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goto err_free_bufs;
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goto err_manuf_cleanup;
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}
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ret = nanddev_init(nand, &spinand_ops, THIS_MODULE);
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