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rtc: ac100: Fix ac100 determine rate bug

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This patch fixes a bug, that prevents the Allwinner A83T and the A80
from a successful boot.

The bug is there since v4.16-rc1 and appeared after the clk branch was
merged.

You can find the shortend trace below:

Unable to handle kernel NULL pointer dereference at virtual address
00000000
pgd = (ptrval)
[00000000] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 49 Comm: kworker/0:1 Not tainted 4.15.0-10190-gb89e32ccd1be #2
Hardware name: Allwinner sun8i Family
Workqueue: events deferred_probe_work_func
PC is at clk_hw_get_rate+0x0/0x34
LR is at ac100_clkout_determine_rate+0x48/0x19c

[ ... ]

(clk_hw_get_rate) from (ac100_clkout_determine_rate+0x48/0x19c)
(ac100_clkout_determine_rate) from  (clk_core_set_rate_nolock+0x3c/0x1a0)
(clk_core_set_rate_nolock) from (clk_set_rate+0x30/0x88)
(clk_set_rate) from (of_clk_set_defaults+0x200/0x364)
(of_clk_set_defaults) from (platform_drv_probe+0x18/0xb0)

To fix that bug, we first check if the return of the
clk_hw_get_parent_by_index is non zero. If it is zero we skip that
clock parent.

The BUG report could be found here: https://lkml.org/lkml/2018/2/10/198

Fixes: 04940631b8d2 ("rtc: ac100: Add clk output support")

Signed-off-by: Philipp Rossak <embed3d@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Philipp Rossak 2018-02-26 22:19:01 +01:00 committed by Alexandre Belloni
parent 188306ac95
commit 561f8281cf
1 changed files with 23 additions and 1 deletions
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24
drivers/rtc/rtc-ac100.c
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@ -183,7 +183,29 @@ static int ac100_clkout_determine_rate(struct clk_hw *hw,
for (i = 0; i < num_parents; i++) {
struct clk_hw *parent = clk_hw_get_parent_by_index(hw, i);
unsigned long tmp, prate = clk_hw_get_rate(parent);
unsigned long tmp, prate;
/*
* The clock has two parents, one is a fixed clock which is
* internally registered by the ac100 driver. The other parent
* is a clock from the codec side of the chip, which we
* properly declare and reference in the devicetree and is
* not implemented in any driver right now.
* If the clock core looks for the parent of that second
* missing clock, it can't find one that is registered and
* returns NULL.
* So we end up in a situation where clk_hw_get_num_parents
* returns the amount of clocks we can be parented to, but
* clk_hw_get_parent_by_index will not return the orphan
* clocks.
* Thus we need to check if the parent exists before
* we get the parent rate, so we could use the RTC
* without waiting for the codec to be supported.
*/
if (!parent)
continue;
prate = clk_hw_get_rate(parent);
tmp = ac100_clkout_round_rate(hw, req->rate, prate);