Use an irq_enable_hazard hazard barrier in unmask_mips_irq. This
hasn't been an actual bug, so it's more a change to be 100% compliant with the requirements of the architecture spec. Similar fix to mask_mips_irq where there was a slightly less theoretical chance of getting hit. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -40,11 +40,13 @@ static int mips_cpu_irq_base;
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static inline void unmask_mips_irq(unsigned int irq)
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{
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set_c0_status(0x100 << (irq - mips_cpu_irq_base));
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irq_enable_hazard();
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}
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static inline void mask_mips_irq(unsigned int irq)
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{
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clear_c0_status(0x100 << (irq - mips_cpu_irq_base));
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irq_disable_hazard();
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}
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static inline void mips_cpu_irq_enable(unsigned int irq)
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