PCI: tegra: Add Tegra194 PCIe support
Add support for Synopsys DesignWare core IP based PCIe host controller present in the Tegra194 SoC. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
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@ -220,6 +220,16 @@ config PCI_MESON
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and therefore the driver re-uses the DesignWare core functions to
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implement the driver.
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config PCIE_TEGRA194
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tristate "NVIDIA Tegra194 (and later) PCIe controller"
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depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIE_DW_HOST
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select PHY_TEGRA194_P2U
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help
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Say Y here if you want support for DesignWare core based PCIe host
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controller found in NVIDIA Tegra194 SoC.
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config PCIE_UNIPHIER
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bool "Socionext UniPhier PCIe controllers"
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depends on ARCH_UNIPHIER || COMPILE_TEST
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@ -15,6 +15,7 @@ obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o
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obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o
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obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o
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obj-$(CONFIG_PCI_MESON) += pci-meson.o
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obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o
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obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o
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# The following drivers are for devices that use the generic ACPI
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@ -456,7 +456,7 @@ int dw_pcie_wait_for_link(struct dw_pcie *pci)
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usleep_range(LINK_WAIT_USLEEP_MIN, LINK_WAIT_USLEEP_MAX);
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}
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dev_err(pci->dev, "Phy link never came up\n");
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dev_info(pci->dev, "Phy link never came up\n");
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return -ETIMEDOUT;
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}
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1641
drivers/pci/controller/dwc/pcie-tegra194.c
Normal file
1641
drivers/pci/controller/dwc/pcie-tegra194.c
Normal file
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