Staging: comedi: more remove C99 comments
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Bill Pemberton
Greg Kroah-Hartman
parent
68c3dbff9f
commit
56e9e16619
@ -811,35 +811,35 @@ int i_EepromReadMainHeader(unsigned short w_PCIBoardEepromAddress,
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struct str_MainHeader s_MainHeader;
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struct str_DigitalInputHeader s_DigitalInputHeader;
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struct str_DigitalOutputHeader s_DigitalOutputHeader;
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//struct str_TimerMainHeader s_TimerMainHeader,s_WatchdogMainHeader;
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/* struct str_TimerMainHeader s_TimerMainHeader,s_WatchdogMainHeader; */
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str_AnalogOutputHeader s_AnalogOutputHeader;
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struct str_AnalogInputHeader s_AnalogInputHeader;
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// Read size
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/* Read size */
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s_MainHeader.w_HeaderSize =
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w_EepromReadWord(w_PCIBoardEepromAddress, pc_PCIChipInformation,
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0x100 + 8);
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// Read nbr of functionality
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/* Read nbr of functionality */
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w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
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pc_PCIChipInformation, 0x100 + 10);
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s_MainHeader.b_Nfunctions = (unsigned char) w_Temp & 0x00FF;
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// Read functionality details
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/* Read functionality details */
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for (i = 0; i < s_MainHeader.b_Nfunctions; i++) {
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// Read Type
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/* Read Type */
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w_Temp = w_EepromReadWord(w_PCIBoardEepromAddress,
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pc_PCIChipInformation, 0x100 + 12 + w_Count);
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s_MainHeader.s_Functions[i].b_Type = (unsigned char) w_Temp & 0x3F;
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w_Count = w_Count + 2;
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//Read Address
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/* Read Address */
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s_MainHeader.s_Functions[i].w_Address =
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w_EepromReadWord(w_PCIBoardEepromAddress,
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pc_PCIChipInformation, 0x100 + 12 + w_Count);
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w_Count = w_Count + 2;
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}
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// Display main header info
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/* Display main header info */
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for (i = 0; i < s_MainHeader.b_Nfunctions; i++) {
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switch (s_MainHeader.s_Functions[i].b_Type) {
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@ -81,7 +81,7 @@ If you do not specify any options, they will default to
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#include "../comedidev.h"
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// address scheme (page 2.17 of the manual)
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/* address scheme (page 2.17 of the manual) */
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#define ADQ12B_SIZE 16
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#define ADQ12B_CTREG 0x00
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@ -94,12 +94,12 @@ If you do not specify any options, they will default to
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#define ADQ12B_CONT2 0x0e
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#define ADQ12B_COWORD 0x0f
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// mask of the bit at STINR to check end of conversion
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/* mask of the bit at STINR to check end of conversion */
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#define ADQ12B_EOC 0x20
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#define TIMEOUT 20
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// available ranges through the PGA gains
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/* available ranges through the PGA gains */
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static const struct comedi_lrange range_adq12b_ai_bipolar = { 4, {
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BIP_RANGE(5),
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BIP_RANGE(2),
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@ -134,7 +134,7 @@ static const struct adq12b_board adq12b_boards[] = {
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.di_chans = 5,
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.do_chans = 8
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}
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// potentially, more adq-based deviced will be added
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/* potentially, more adq-based deviced will be added */
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/*,
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.name = "adq12b",
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.ai_chans = 16, // this is just for reference, hardcoded again later
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@ -337,17 +337,17 @@ static int adq12b_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s
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/* wait for end of convertion */
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i = 0;
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do {
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// comedi_udelay(1);
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/* comedi_udelay(1); */
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status = inb(dev->iobase + ADQ12B_STINR);
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status = status & ADQ12B_EOC;
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} while (status == 0 && ++i < TIMEOUT);
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// } while (++i < 10);
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/* } while (++i < 10); */
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/* read data */
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hi = inb(dev->iobase + ADQ12B_ADHIG);
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lo = inb(dev->iobase + ADQ12B_ADLOW);
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//rt_printk("debug: chan=%d range=%d status=%d hi=%d lo=%d\n", channel, range, status, hi, lo);
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/* rt_printk("debug: chan=%d range=%d status=%d hi=%d lo=%d\n", channel, range, status, hi, lo); */
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data[n] = (hi << 8) | lo;
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}
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@ -66,8 +66,8 @@ comedi_nonfree_firmware tarball available from http://www.comedi.org
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*/
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#define USE_DMA
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//#define DEBUG 1
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//#define DEBUG_FLAGS
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/* #define DEBUG 1 */
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/* #define DEBUG_FLAGS */
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#include "../comedidev.h"
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@ -117,9 +117,9 @@ comedi_nonfree_firmware tarball available from http://www.comedi.org
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#define Waited (1<<5)
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#define PrimaryTC (1<<6)
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#define SecondaryTC (1<<7)
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//#define SerialRose
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//#define ReqRose
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//#define Paused
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/* #define SerialRose */
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/* #define ReqRose */
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/* #define Paused */
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#define Group_1_First_Clear 6 /* W */
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#define Group_2_First_Clear 7 /* W */
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@ -206,7 +206,7 @@ comedi_nonfree_firmware tarball available from http://www.comedi.org
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#define DMA_Line_Control_Group1 76
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#define DMA_Line_Control_Group2 108
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// channel zero is none
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/* channel zero is none */
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static inline unsigned primary_DMAChannel_bits(unsigned channel)
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{
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return channel & 0x3;
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@ -486,7 +486,7 @@ static irqreturn_t nidio_interrupt(int irq, void *d)
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struct comedi_async *async = s->async;
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struct mite_struct *mite = devpriv->mite;
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//int i, j;
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/* int i, j; */
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long int AuxData = 0;
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short data1 = 0;
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short data2 = 0;
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@ -496,9 +496,9 @@ static irqreturn_t nidio_interrupt(int irq, void *d)
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unsigned int m_status = 0;
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unsigned long irq_flags;
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//interrupcions parasites
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/* interrupcions parasites */
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if (dev->attached == 0) {
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// assume it's from another card
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/* assume it's from another card */
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return IRQ_NONE;
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}
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@ -511,8 +511,8 @@ static irqreturn_t nidio_interrupt(int irq, void *d)
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ni_pcidio_print_flags(flags);
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ni_pcidio_print_status(status);
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//printk("buf[0]=%08x\n",*(unsigned int *)async->prealloc_buf);
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//printk("buf[4096]=%08x\n",*(unsigned int *)(async->prealloc_buf+4096));
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/* printk("buf[0]=%08x\n",*(unsigned int *)async->prealloc_buf); */
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/* printk("buf[4096]=%08x\n",*(unsigned int *)(async->prealloc_buf+4096)); */
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comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, irq_flags);
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if (devpriv->di_mite_chan)
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@ -520,8 +520,8 @@ static irqreturn_t nidio_interrupt(int irq, void *d)
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#ifdef MITE_DEBUG
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mite_print_chsr(m_status);
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#endif
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//printk("mite_bytes_transferred: %d\n",mite_bytes_transferred(mite,DI_DMA_CHAN));
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//mite_dump_regs(mite);
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/* printk("mite_bytes_transferred: %d\n",mite_bytes_transferred(mite,DI_DMA_CHAN)); */
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/* mite_dump_regs(mite); */
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if (m_status & CHSR_INT) {
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if (m_status & CHSR_LINKC) {
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writel(CHOR_CLRLC,
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@ -552,7 +552,7 @@ static irqreturn_t nidio_interrupt(int irq, void *d)
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flags &= IntEn;
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if (flags & TransferReady) {
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//DPRINTK("TransferReady\n");
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/* DPRINTK("TransferReady\n"); */
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while (flags & TransferReady) {
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work++;
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if (work > 100) {
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@ -569,14 +569,14 @@ static irqreturn_t nidio_interrupt(int irq, void *d)
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data2 = (AuxData & 0xffff0000) >> 16;
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comedi_buf_put(async, data1);
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comedi_buf_put(async, data2);
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//DPRINTK("read:%d, %d\n",data1,data2);
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/* DPRINTK("read:%d, %d\n",data1,data2); */
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flags = readb(devpriv->mite->daq_io_addr +
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Group_1_Flags);
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}
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//DPRINTK("buf_int_count: %d\n",async->buf_int_count);
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//DPRINTK("1) IntEn=%d,flags=%d,status=%d\n",IntEn,flags,status);
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//ni_pcidio_print_flags(flags);
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//ni_pcidio_print_status(status);
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/* DPRINTK("buf_int_count: %d\n",async->buf_int_count); */
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/* DPRINTK("1) IntEn=%d,flags=%d,status=%d\n",IntEn,flags,status); */
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/* ni_pcidio_print_flags(flags); */
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/* ni_pcidio_print_status(status); */
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async->events |= COMEDI_CB_BLOCK;
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}
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@ -621,10 +621,10 @@ static irqreturn_t nidio_interrupt(int irq, void *d)
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flags = readb(devpriv->mite->daq_io_addr + Group_1_Flags);
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status = readb(devpriv->mite->daq_io_addr +
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Interrupt_And_Window_Status);
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//DPRINTK("loop end: IntEn=0x%02x,flags=0x%02x,status=0x%02x\n",
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// IntEn,flags,status);
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//ni_pcidio_print_flags(flags);
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//ni_pcidio_print_status(status);
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/* DPRINTK("loop end: IntEn=0x%02x,flags=0x%02x,status=0x%02x\n", */
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/* IntEn,flags,status); */
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/* ni_pcidio_print_flags(flags); */
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/* ni_pcidio_print_status(status); */
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}
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out:
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@ -963,7 +963,7 @@ static int ni_pcidio_cmd(struct comedi_device * dev, struct comedi_subdevice * s
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/* clear and enable interrupts */
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writeb(0xff, devpriv->mite->daq_io_addr + Group_1_First_Clear);
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//writeb(ClearExpired,devpriv->mite->daq_io_addr+Group_1_Second_Clear);
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/* writeb(ClearExpired,devpriv->mite->daq_io_addr+Group_1_Second_Clear); */
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writeb(IntEn, devpriv->mite->daq_io_addr + Interrupt_Control);
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writeb(0x03,
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@ -971,7 +971,7 @@ static int ni_pcidio_cmd(struct comedi_device * dev, struct comedi_subdevice * s
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if (cmd->stop_src == TRIG_NONE) {
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devpriv->OpModeBits = DataLatching(0) | RunMode(7);
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} else { // TRIG_TIMER
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} else { /* TRIG_TIMER */
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devpriv->OpModeBits = Numbered | RunMode(7);
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}
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if (cmd->start_src == TRIG_NOW) {
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