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Merge branch 'pci/host/imx6'

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- Drop redundant error message from imx6_pcie_probe() (Zhen Lei)

- Limit DBI register length on i.MX 6QuadPlus (Richard Zhu)

- Add "vph-supply" to indicate which regulator supplies PHY (Richard Zhu)

- Enable PHY internal regulator when supplied >3V (Richard Zhu)

* pci/host/imx6:
  PCI: imx6: Enable PHY internal regulator when supplied >3V
  dt-bindings: imx6q-pcie: Add "vph-supply" for PHY supply voltage
  PCI: imx6: Limit DBI register length for imx6qp PCIe
  PCI: imx6: Remove imx6_pcie_probe() redundant error message
This commit is contained in:
Bjorn Helgaas 2021-07-06 10:56:26 -05:00
commit 570987cb4c
2 changed files with 25 additions and 3 deletions
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3
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
View File

@ -38,6 +38,9 @@ Optional properties:
The regulator will be enabled when initializing the PCIe host and
disabled either as part of the init process or when shutting down the
host.
- vph-supply: Should specify the regulator in charge of VPH one of the three
PCIe PHY powers. This regulator can be supplied by both 1.8v and 3.3v voltage
supplies.
Additional required properties for imx6sx-pcie:
- clock names: Must include the following additional entries:

25
drivers/pci/controller/dwc/pci-imx6.c
View File

@ -37,6 +37,7 @@
#define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9)
#define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10)
#define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11)
#define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12)
#define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8)
#define IMX8MQ_PCIE2_BASE_ADDR 0x33c00000
@ -80,6 +81,7 @@ struct imx6_pcie {
u32 tx_swing_full;
u32 tx_swing_low;
struct regulator *vpcie;
struct regulator *vph;
void __iomem *phy_base;
/* power domain for pcie */
@ -621,6 +623,17 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
imx6_pcie_grp_offset(imx6_pcie),
IMX8MQ_GPR_PCIE_REF_USE_PAD,
IMX8MQ_GPR_PCIE_REF_USE_PAD);
/*
* Regarding the datasheet, the PCIE_VPH is suggested
* to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the
* VREG_BYPASS should be cleared to zero.
*/
if (imx6_pcie->vph &&
regulator_get_voltage(imx6_pcie->vph) > 3000000)
regmap_update_bits(imx6_pcie->iomuxc_gpr,
imx6_pcie_grp_offset(imx6_pcie),
IMX8MQ_GPR_PCIE_VREG_BYPASS,
0);
break;
case IMX7D:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
@ -1002,10 +1015,8 @@ static int imx6_pcie_probe(struct platform_device *pdev)
return ret;
}
imx6_pcie->phy_base = devm_ioremap_resource(dev, &res);
if (IS_ERR(imx6_pcie->phy_base)) {
dev_err(dev, "Unable to map PCIe PHY\n");
if (IS_ERR(imx6_pcie->phy_base))
return PTR_ERR(imx6_pcie->phy_base);
}
}
dbi_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@ -1130,6 +1141,13 @@ static int imx6_pcie_probe(struct platform_device *pdev)
imx6_pcie->vpcie = NULL;
}
imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev, "vph");
if (IS_ERR(imx6_pcie->vph)) {
if (PTR_ERR(imx6_pcie->vph) != -ENODEV)
return PTR_ERR(imx6_pcie->vph);
imx6_pcie->vph = NULL;
}
platform_set_drvdata(pdev, imx6_pcie);
ret = imx6_pcie_attach_pd(dev);
@ -1175,6 +1193,7 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.variant = IMX6QP,
.flags = IMX6_PCIE_FLAG_IMX6_PHY |
IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE,
.dbi_length = 0x200,
},
[IMX7D] = {
.variant = IMX7D,