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ARM: tegra: update the cache maintenance order for CPU shutdown

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Updating the cache maintenance order before CPU shutdown when doing CPU
hotplug.
The old order:
* clean L1 by flush_cache_all
* exit SMP
* CPU shutdown
Adapt to:
* disable L1 data cache by clear C bit
* clean L1 by v7_flush_dcache_louis
* exit SMP
* CPU shutdown

For CPU hotplug case, it's no need to do "flush_cache_all". And we should
disable L1 data cache before clean L1 data cache. Then leaving the SMP
coherency.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Joseph Lo 2013-01-03 14:42:59 +08:00 committed by Stephen Warren
parent 130bfed72c
commit 57886616ca
5 changed files with 6 additions and 9 deletions
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4
arch/arm/mach-tegra/hotplug.c
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@ -28,8 +28,8 @@ void __ref tegra_cpu_die(unsigned int cpu)
{ {
cpu = cpu_logical_map(cpu); cpu = cpu_logical_map(cpu);
/* Flush the L1 data cache. */ /* Clean L1 data cache */
flush_cache_all(); tegra_disable_clean_inv_dcache();
/* Shut down the current CPU. */ /* Shut down the current CPU. */
tegra_hotplug_shutdown(); tegra_hotplug_shutdown();

3
arch/arm/mach-tegra/sleep-tegra20.S
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@ -33,9 +33,6 @@
* should never return * should never return
*/ */
ENTRY(tegra20_hotplug_shutdown) ENTRY(tegra20_hotplug_shutdown)
/* Turn off SMP coherency */
exit_smp r4, r5
/* Put this CPU down */ /* Put this CPU down */
cpu_id r0 cpu_id r0
bl tegra20_cpu_shutdown bl tegra20_cpu_shutdown

3
arch/arm/mach-tegra/sleep-tegra30.S
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@ -32,9 +32,6 @@
* Should never return. * Should never return.
*/ */
ENTRY(tegra30_hotplug_shutdown) ENTRY(tegra30_hotplug_shutdown)
/* Turn off SMP coherency */
exit_smp r4, r5
/* Powergate this CPU */ /* Powergate this CPU */
mov r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN mov r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN
bl tegra30_cpu_shutdown bl tegra30_cpu_shutdown

4
arch/arm/mach-tegra/sleep.S
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@ -34,7 +34,7 @@
#include "flowctrl.h" #include "flowctrl.h"
#include "sleep.h" #include "sleep.h"
#ifdef CONFIG_PM_SLEEP #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP)
/* /*
* tegra_disable_clean_inv_dcache * tegra_disable_clean_inv_dcache
* *
@ -60,7 +60,9 @@ ENTRY(tegra_disable_clean_inv_dcache)
ldmfd sp!, {r0, r4-r5, r7, r9-r11, pc} ldmfd sp!, {r0, r4-r5, r7, r9-r11, pc}
ENDPROC(tegra_disable_clean_inv_dcache) ENDPROC(tegra_disable_clean_inv_dcache)
#endif
#ifdef CONFIG_PM_SLEEP
/* /*
* tegra_sleep_cpu_finish(unsigned long v2p) * tegra_sleep_cpu_finish(unsigned long v2p)
* *

1
arch/arm/mach-tegra/sleep.h
View File

@ -106,6 +106,7 @@ exit_l2_resume:
#else #else
void tegra_resume(void); void tegra_resume(void);
int tegra_sleep_cpu_finish(unsigned long); int tegra_sleep_cpu_finish(unsigned long);
void tegra_disable_clean_inv_dcache(void);
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU
void tegra20_hotplug_init(void); void tegra20_hotplug_init(void);