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drm/xe/guc: Port Wa_14012197797/Wa_22011391025 to xe_wa

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Wa_14012197797 and Wa_22011391025 apply to DG2 using the same action.
They apply to slightly different conditions. Add both to the oob rules
so they are both reported as active.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230526164358.86393-16-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Lucas De Marchi 2023-05-26 09:43:52 -07:00 committed by Rodrigo Vivi
parent fb395db74b
commit 57a148d63d
2 changed files with 3 additions and 8 deletions
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9
drivers/gpu/drm/xe/xe_guc.c
View File

@ -147,14 +147,7 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
xe->info.platform == XE_DG2)
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
/*
* Wa_14012197797
* Wa_22011391025
*
* The same WA bit is used for both and 22011391025 is applicable to
* all DG2.
*/
if (xe->info.platform == XE_DG2)
if (XE_WA(gt, 22011391025) || XE_WA(gt, 14012197797))
flags |= GUC_WA_DUAL_QUEUE;
/*

2
drivers/gpu/drm/xe/xe_wa_oob.rules
View File

@ -1,2 +1,4 @@
22012773006 GRAPHICS_VERSION_RANGE(1200, 1250)
16011759253 SUBPLATFORM(DG2, G10), GRAPHICS_STEP(A0, B0)
22011391025 PLATFORM(DG2)
14012197797 PLATFORM(DG2), GRAPHICS_STEP(A0, B0)