video: fbdev: aty: Fix set but not used warnings
Fix W=1 warnings about variables assigned but never used. - Drop variables that were set but never used - Make variable definition conditional on ATARI v2: - Fix m68k build error (kernel test robot) - Improve subject (Lee Jones) Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reported-by: kernel test robot <lkp@intel.com> # m68k build fix Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Cc: Lee Jones <lee.jones@linaro.org> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Joe Perches <joe@perches.com> Cc: Vaibhav Gupta <vaibhavgupta40@gmail.com> Cc: Jason Yan <yanaijie@huawei.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201128224114.1033617-6-sam@ravnborg.org
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@ -2353,6 +2353,9 @@ static int aty_init(struct fb_info *info)
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int gtb_memsize, has_var = 0;
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struct fb_var_screeninfo var;
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int ret;
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#ifdef CONFIG_ATARI
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u8 dac_type;
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#endif
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init_waitqueue_head(&par->vblank.wait);
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spin_lock_init(&par->int_lock);
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@ -2360,13 +2363,12 @@ static int aty_init(struct fb_info *info)
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#ifdef CONFIG_FB_ATY_GX
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if (!M64_HAS(INTEGRATED)) {
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u32 stat0;
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u8 dac_type, dac_subtype, clk_type;
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u8 dac_subtype, clk_type;
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stat0 = aty_ld_le32(CNFG_STAT0, par);
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par->bus_type = (stat0 >> 0) & 0x07;
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par->ram_type = (stat0 >> 3) & 0x07;
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ramname = aty_gx_ram[par->ram_type];
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/* FIXME: clockchip/RAMDAC probing? */
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dac_type = (aty_ld_le32(DAC_CNTL, par) >> 16) & 0x07;
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#ifdef CONFIG_ATARI
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clk_type = CLK_ATI18818_1;
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dac_type = (stat0 >> 9) & 0x07;
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@ -2375,7 +2377,6 @@ static int aty_init(struct fb_info *info)
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else
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dac_subtype = (aty_ld_8(SCRATCH_REG1 + 1, par) & 0xF0) | dac_type;
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#else
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dac_type = DAC_IBMRGB514;
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dac_subtype = DAC_IBMRGB514;
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clk_type = CLK_IBMRGB514;
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#endif
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@ -3062,7 +3063,6 @@ static int atyfb_setup_sparc(struct pci_dev *pdev, struct fb_info *info,
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if (dp == of_console_device) {
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struct fb_var_screeninfo *var = &default_var;
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unsigned int N, P, Q, M, T, R;
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u32 v_total, h_total;
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struct crtc crtc;
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u8 pll_regs[16];
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u8 clock_cntl;
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@ -3078,9 +3078,6 @@ static int atyfb_setup_sparc(struct pci_dev *pdev, struct fb_info *info,
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crtc.gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, par);
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aty_crtc_to_var(&crtc, var);
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h_total = var->xres + var->right_margin + var->hsync_len + var->left_margin;
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v_total = var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
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/*
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* Read the PLL to figure actual Refresh Rate.
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*/
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