clk: en7523: fix rate divider for slic and spi clocks
Introduce div_offset field in en_clk_desc struct in order to fix rate
divider estimation in en7523_get_div routine for slic and spi fixed
rate clocks.
Moreover, fix base_shift for crypto clock.
Fixes: 1e62731791
("clk: en7523: Add clock driver for Airoha EN7523 SoC")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/c491bdea05d847f1f1294b94f14725d292eb95d0.1718615934.git.lorenzo@kernel.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
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@ -62,6 +62,7 @@ struct en_clk_desc {
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u8 div_shift;
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u16 div_val0;
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u8 div_step;
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u8 div_offset;
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};
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struct en_clk_gate {
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@ -106,6 +107,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
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.div_bits = 3,
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.div_shift = 0,
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.div_step = 1,
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.div_offset = 1,
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}, {
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.id = EN7523_CLK_EMI,
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.name = "emi",
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@ -119,6 +121,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
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.div_bits = 3,
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.div_shift = 0,
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.div_step = 1,
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.div_offset = 1,
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}, {
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.id = EN7523_CLK_BUS,
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.name = "bus",
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@ -132,6 +135,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
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.div_bits = 3,
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.div_shift = 0,
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.div_step = 1,
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.div_offset = 1,
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}, {
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.id = EN7523_CLK_SLIC,
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.name = "slic",
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@ -172,13 +176,14 @@ static const struct en_clk_desc en7523_base_clks[] = {
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.div_bits = 3,
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.div_shift = 0,
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.div_step = 1,
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.div_offset = 1,
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}, {
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.id = EN7523_CLK_CRYPTO,
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.name = "crypto",
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.base_reg = REG_CRYPTO_CLKSRC,
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.base_bits = 1,
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.base_shift = 8,
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.base_shift = 0,
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.base_values = emi_base,
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.n_base_values = ARRAY_SIZE(emi_base),
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}
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@ -281,7 +286,7 @@ static u32 en7523_get_div(void __iomem *base, int i)
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if (!val && desc->div_val0)
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return desc->div_val0;
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return (val + 1) * desc->div_step;
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return (val + desc->div_offset) * desc->div_step;
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}
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static int en7523_pci_is_enabled(struct clk_hw *hw)
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