clk: vt8500: Fix division-by-0 when requested rate=0
A request to vt8500_dclk_(round_rate/set_rate) with rate=0 results in a division-by-0 in the kernel. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -121,7 +121,12 @@ static long vt8500_dclk_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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struct clk_device *cdev = to_clk_device(hw);
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u32 divisor = *prate / rate;
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u32 divisor;
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if (rate == 0)
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return 0;
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divisor = *prate / rate;
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/* If prate / rate would be decimal, incr the divisor */
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if (rate * divisor < *prate)
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@ -142,9 +147,14 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_device *cdev = to_clk_device(hw);
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u32 divisor = parent_rate / rate;
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u32 divisor;
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unsigned long flags = 0;
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if (rate == 0)
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return 0;
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divisor = parent_rate / rate;
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/* If prate / rate would be decimal, incr the divisor */
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if (rate * divisor < *prate)
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divisor++;
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