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ARM: at91/pm: MOR register KEY was missing

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Because writing the MOR register requires the PASSWD(0x37),
if missed, the write operation will be aborted.

Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Patrice Vilchez 2015-02-12 10:52:13 +08:00 committed by Nicolas Ferre
parent db68e71a0e
commit 5957457a2d
1 changed files with 2 additions and 0 deletions
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2
arch/arm/mach-at91/pm_slowclock.S
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@ -205,6 +205,7 @@ sdr_sr_done:
/* Turn off the main oscillator */ /* Turn off the main oscillator */
ldr tmp1, [pmc, #AT91_CKGR_MOR] ldr tmp1, [pmc, #AT91_CKGR_MOR]
bic tmp1, tmp1, #AT91_PMC_MOSCEN bic tmp1, tmp1, #AT91_PMC_MOSCEN
orr tmp1, tmp1, #AT91_PMC_KEY
str tmp1, [pmc, #AT91_CKGR_MOR] str tmp1, [pmc, #AT91_CKGR_MOR]
/* Wait for interrupt */ /* Wait for interrupt */
@ -213,6 +214,7 @@ sdr_sr_done:
/* Turn on the main oscillator */ /* Turn on the main oscillator */
ldr tmp1, [pmc, #AT91_CKGR_MOR] ldr tmp1, [pmc, #AT91_CKGR_MOR]
orr tmp1, tmp1, #AT91_PMC_MOSCEN orr tmp1, tmp1, #AT91_PMC_MOSCEN
orr tmp1, tmp1, #AT91_PMC_KEY
str tmp1, [pmc, #AT91_CKGR_MOR] str tmp1, [pmc, #AT91_CKGR_MOR]
wait_moscrdy wait_moscrdy