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powerpc: add Book E support to 64-bit hibernation

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Update the 64-bit hibernation code to support Book E CPUs.
Some registers and instructions are not defined for Book3e
(SDR reg, tlbia instruction).

SDR: Storage Description Register. Book3S and Book3E have different
address translation mode, we do not need HTABORG & HTABSIZE to
translate virtual address to real address.

More registers are saved in BookE-64bit.(TCR, SPRG1)

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Wang Dongsheng 2013-08-08 10:06:45 +08:00 committed by Scott Wood
parent 75898156bc
commit 5a31057fc0
1 changed files with 43 additions and 2 deletions
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45
arch/powerpc/kernel/swsusp_asm64.S
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@ -46,10 +46,19 @@
#define SL_r29 0xe8 #define SL_r29 0xe8
#define SL_r30 0xf0 #define SL_r30 0xf0
#define SL_r31 0xf8 #define SL_r31 0xf8
#define SL_SIZE SL_r31+8 #define SL_SPRG1 0x100
#define SL_TCR 0x108
#define SL_SIZE SL_TCR+8
/* these macros rely on the save area being /* these macros rely on the save area being
* pointed to by r11 */ * pointed to by r11 */
#define SAVE_SPR(register) \
mfspr r0, SPRN_##register ;\
std r0, SL_##register(r11)
#define RESTORE_SPR(register) \
ld r0, SL_##register(r11) ;\
mtspr SPRN_##register, r0
#define SAVE_SPECIAL(special) \ #define SAVE_SPECIAL(special) \
mf##special r0 ;\ mf##special r0 ;\
std r0, SL_##special(r11) std r0, SL_##special(r11)
@ -103,8 +112,15 @@ _GLOBAL(swsusp_arch_suspend)
SAVE_REGISTER(r30) SAVE_REGISTER(r30)
SAVE_REGISTER(r31) SAVE_REGISTER(r31)
SAVE_SPECIAL(MSR) SAVE_SPECIAL(MSR)
SAVE_SPECIAL(SDR1)
SAVE_SPECIAL(XER) SAVE_SPECIAL(XER)
#ifdef CONFIG_PPC_BOOK3S_64
SAVE_SPECIAL(SDR1)
#else
SAVE_SPR(TCR)
/* Save SPRG1, SPRG1 be used save paca */
SAVE_SPR(SPRG1)
#endif
/* we push the stack up 128 bytes but don't store the /* we push the stack up 128 bytes but don't store the
* stack pointer on the stack like a real stackframe */ * stack pointer on the stack like a real stackframe */
@ -151,6 +167,7 @@ copy_page_loop:
bne+ copyloop bne+ copyloop
nothing_to_copy: nothing_to_copy:
#ifdef CONFIG_PPC_BOOK3S_64
/* flush caches */ /* flush caches */
lis r3, 0x10 lis r3, 0x10
mtctr r3 mtctr r3
@ -167,6 +184,7 @@ nothing_to_copy:
sync sync
tlbia tlbia
#endif
ld r11,swsusp_save_area_ptr@toc(r2) ld r11,swsusp_save_area_ptr@toc(r2)
@ -208,16 +226,39 @@ nothing_to_copy:
RESTORE_REGISTER(r29) RESTORE_REGISTER(r29)
RESTORE_REGISTER(r30) RESTORE_REGISTER(r30)
RESTORE_REGISTER(r31) RESTORE_REGISTER(r31)
#ifdef CONFIG_PPC_BOOK3S_64
/* can't use RESTORE_SPECIAL(MSR) */ /* can't use RESTORE_SPECIAL(MSR) */
ld r0, SL_MSR(r11) ld r0, SL_MSR(r11)
mtmsrd r0, 0 mtmsrd r0, 0
RESTORE_SPECIAL(SDR1) RESTORE_SPECIAL(SDR1)
#else
/* Restore SPRG1, be used to save paca */
ld r0, SL_SPRG1(r11)
mtsprg 1, r0
RESTORE_SPECIAL(MSR)
/* Restore TCR and clear any pending bits in TSR. */
RESTORE_SPR(TCR)
lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h
mtspr SPRN_TSR, r0
/* Kick decrementer */
li r0, 1
mtdec r0
/* Invalidate all tlbs */
bl _tlbil_all
#endif
RESTORE_SPECIAL(XER) RESTORE_SPECIAL(XER)
sync sync
addi r1,r1,-128 addi r1,r1,-128
#ifdef CONFIG_PPC_BOOK3S_64
bl slb_flush_and_rebolt bl slb_flush_and_rebolt
#endif
bl do_after_copyback bl do_after_copyback
addi r1,r1,128 addi r1,r1,128