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drm/amd/display: set HBR3 and TPS4 capable flags

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Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hersen Wu 2016-12-23 15:13:13 -05:00 committed by Alex Deucher
parent aff20230b4
commit 5a7a1eebc6
1 changed files with 10 additions and 0 deletions
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10
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
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@ -1068,9 +1068,19 @@ bool dce110_link_encoder_construct(
&bp_cap_info))
enc110->base.features.flags.bits.IS_HBR2_CAPABLE =
bp_cap_info.DP_HBR2_CAP;
enc110->base.features.flags.bits.IS_HBR3_CAPABLE =
bp_cap_info.DP_HBR3_EN;
}
/* TODO: check PPLIB maxPhyClockInKHz <= 540000, if yes,
* IS_HBR3_CAPABLE = 0.
*/
/* test pattern 3 support */
enc110->base.features.flags.bits.IS_TPS3_CAPABLE = true;
/* test pattern 4 support */
enc110->base.features.flags.bits.IS_TPS4_CAPABLE = true;
enc110->base.features.flags.bits.IS_Y_ONLY_CAPABLE = false;
/*