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dt-bindings: dma: rz-dmac: Document clock-names and reset-names

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Document clock-names and reset-names properties as we have multiple
clocks and resets.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230315064726.22739-1-biju.das.jz@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Biju Das 2023-03-15 06:47:25 +00:00 committed by Vinod Koul
parent d1e71a3a7a
commit 5aaf9079d7
1 changed files with 14 additions and 0 deletions
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Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
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@ -54,6 +54,11 @@ properties:
- description: DMA main clock
- description: DMA register access clock
clock-names:
items:
- const: main
- const: register
'#dma-cells':
const: 1
description:
@ -77,16 +82,23 @@ properties:
- description: Reset for DMA ARESETN reset terminal
- description: Reset for DMA RST_ASYNC reset terminal
reset-names:
items:
- const: arst
- const: rst_async
required:
- compatible
- reg
- interrupts
- interrupt-names
- clocks
- clock-names
- '#dma-cells'
- dma-channels
- power-domains
- resets
- reset-names
additionalProperties: false
@ -124,9 +136,11 @@ examples:
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>,
<&cpg CPG_MOD R9A07G044_DMAC_PCLK>;
clock-names = "main", "register";
power-domains = <&cpg>;
resets = <&cpg R9A07G044_DMAC_ARESETN>,
<&cpg R9A07G044_DMAC_RST_ASYNC>;
reset-names = "arst", "rst_async";
#dma-cells = <1>;
dma-channels = <16>;
};