Samsung DTS ARM64 changes for v6.10

1. Add FIFO depth to each SPI node so we can avoid matching this through
    DTS alias.  Difference SPI instances on given SoC have different FIFO
    depths.
 2. Exynos850: add clock controllers providing clocks to CPUs.
 3. Google GS101: few cleanups and add missing serial engine (USI)
    interface nodes.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmYqA4gQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1yUJEACEAN4PSt1XsENwwH7wyIXn+Yehx4wszoIC
 jXiYotrWC8wcqg5gdcimCIyHGSO/Bg6C1UgvMxmo4QLXJ3NnMRWPENqd+k6sfTcW
 LxhzJeLGDSYHI3CArPV/gc9WFnypAuDVHrWLOSxgUbvxuv/8nZe7Xd2cGScz2h9G
 JHE6Kfpp08S1NtcaTyUNko8/DU2bl9sKjEVP6sDjqtsZqNv5TMLICbUq6R9HervL
 bslHCEfTy12Ov0SLmh+wbPhv/Mh6VWW/PO6hA5cvgwFPo3E+Q2UOz2i7wtI1Wff6
 8fBBpDaVuJF9vDgDZKxmATHZJpJNLXyaVUmHgPcM8hQ7Yt8aX7jH/Jymr4VSwgho
 a0duE/usSYNn5yfO+5d3UWwUv3BY4g4YX0LPTdONu37+J2JFUi88FjDOWPNc/Uh2
 o9zieilx2vrzhU6njizlKF9irWSojEzzZEzbWCAhs2JXBJATiPMYvh/zB08yy1oK
 Rm9SaznlOBJwCqG6s3DgYTvgsMRj8YkWyLR0AW//4fKCC57WeyLtgfZDRWK+XYZm
 XwAtbrbfMZBLq/kxoc4zOJ/UhySnLvlvuXWjRcJKJPqlQDDEGl31KJIbnYQHFr6U
 EZWXcsaCGu2yES55RTCgp+hxJfqmOZhc7DVulQoHu7CvEuRr/XOQ8SCpr3PIFkOc
 im01Ydquiw==
 =NTPF
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYvWv8ACgkQYKtH/8kJ
 UicYNA//Ynh/68Wg83w0+diMFKbM6a0uznzgyLeo9eIKRB7a90AiKLat2UuLHkZH
 GTPmQYJur6hbJ2iVoSUI/AMwVX82PFqXGCbWmgbau3515ICFQlW5aJhy7Zm9Ingo
 si9bTC5DSAzKwkCyFpbVC0iO6I0dGKZUoVV4nPgqjd7TQUOUg1kwMFrKcLymPBWv
 d9fit6bLZTMBLtZa9+b+DGvpe0Bkv9IVR8PFDYCkcSZg6/JaXrdoKwZ/pTl2DZLG
 bifP3v8P9VOGahC29E+oOliAIk3Z5Uey4cwc5tQIZ76G3o0MUqLCngtdW7SngFnx
 JcP9MhB9hoQB7zB7Bz8kKeDLKl/Jk7YW83hWqPbdJYSybQdySR28AWMZXGmvMmWe
 q8Z5tp6uQMfCPsrBAZmBQJEx/fBGbALlbeuwV7vXHvCXeItlWZ6FsX7coWhz5rNq
 Dt8KC9niT7VZGYn3gzaNs9SSMvWj9x7uB4v669k5N6LnyQku3iL+z9RDi/OCVx3X
 gJWHKf55KmZicjHSrCaTIADUeblK18dxeKzxVOh3DSM6PVJL4nLTExTA4Zl21gAv
 Caxwbl10rrZTrNcVXld1Bm5QWvbYjjIT+I0sAzwMzj/4FbLFdzRparjwCNCccQ6i
 DcLZZpKusgFXhW1J/setxITi0pV1PASYX5narCHa+xWfK4sHJ5k=
 =K6Ie
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.10

1. Add FIFO depth to each SPI node so we can avoid matching this through
   DTS alias.  Difference SPI instances on given SoC have different FIFO
   depths.
2. Exynos850: add clock controllers providing clocks to CPUs.
3. Google GS101: few cleanups and add missing serial engine (USI)
   interface nodes.

* tag 'samsung-dt64-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: gs101: define all PERIC USI nodes
  arm64: dts: exynos: gs101: join lines close to 80 chars
  arm64: dts: exynos: gs101: move pinctrl-* properties after clocks
  arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
  arm64: dts: exynos: gs101: reorder pinctrl-* properties
  arm64: dts: exynos850: Add CPU clocks
  arm64: dts: exynosautov9: specify the SPI FIFO depth
  arm64: dts: exynos5433: specify the SPI FIFO depth

Link: https://lore.kernel.org/r/20240425071856.9235-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2024-04-29 10:31:59 +02:00
commit 5ac40fdde3
5 changed files with 823 additions and 15 deletions

View File

@ -1468,6 +1468,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
num-cs = <1>;
fifo-depth = <256>;
status = "disabled";
};
@ -1487,6 +1488,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
num-cs = <1>;
fifo-depth = <64>;
status = "disabled";
};
@ -1506,6 +1508,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
num-cs = <1>;
fifo-depth = <64>;
status = "disabled";
};
@ -1525,6 +1528,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi3_bus>;
num-cs = <1>;
fifo-depth = <64>;
status = "disabled";
};
@ -1544,6 +1548,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi4_bus>;
num-cs = <1>;
fifo-depth = <64>;
status = "disabled";
};

View File

@ -93,6 +93,8 @@
compatible = "arm,cortex-a55";
reg = <0x0>;
enable-method = "psci";
clocks = <&cmu_cpucl0 CLK_CLUSTER0_SCLK>;
clock-names = "cluster0_clk";
};
cpu1: cpu@1 {
device_type = "cpu";
@ -117,6 +119,8 @@
compatible = "arm,cortex-a55";
reg = <0x100>;
enable-method = "psci";
clocks = <&cmu_cpucl1 CLK_CLUSTER1_SCLK>;
clock-names = "cluster1_clk";
};
cpu5: cpu@101 {
device_type = "cpu";
@ -254,6 +258,28 @@
"dout_peri_uart", "dout_peri_ip";
};
cmu_cpucl1: clock-controller@10800000 {
compatible = "samsung,exynos850-cmu-cpucl1";
reg = <0x10800000 0x8000>;
#clock-cells = <1>;
clocks = <&oscclk>, <&cmu_top CLK_DOUT_CPUCL1_SWITCH>,
<&cmu_top CLK_DOUT_CPUCL1_DBG>;
clock-names = "oscclk", "dout_cpucl1_switch",
"dout_cpucl1_dbg";
};
cmu_cpucl0: clock-controller@10900000 {
compatible = "samsung,exynos850-cmu-cpucl0";
reg = <0x10900000 0x8000>;
#clock-cells = <1>;
clocks = <&oscclk>, <&cmu_top CLK_DOUT_CPUCL0_SWITCH>,
<&cmu_top CLK_DOUT_CPUCL0_DBG>;
clock-names = "oscclk", "dout_cpucl0_switch",
"dout_cpucl0_dbg";
};
cmu_g3d: clock-controller@11400000 {
compatible = "samsung,exynos850-cmu-g3d";
reg = <0x11400000 0x8000>;

View File

@ -435,6 +435,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <256>;
status = "disabled";
};
@ -526,6 +527,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <256>;
status = "disabled";
};
@ -617,6 +619,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
@ -708,6 +711,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
@ -799,6 +803,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
@ -890,6 +895,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
@ -981,6 +987,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <256>;
status = "disabled";
};
@ -1072,6 +1079,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
@ -1163,6 +1171,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
@ -1254,6 +1263,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
@ -1345,6 +1355,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
@ -1434,6 +1445,7 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};

View File

@ -29,8 +29,8 @@
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
pinctrl-names = "default";
button-vol-down {
label = "KEY_VOLUMEDOWN";
@ -103,8 +103,6 @@
};
&serial_0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_bus>;
status = "okay";
};

View File

@ -373,9 +373,393 @@
interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>;
};
usi1: usi@109000c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109000c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1000>;
status = "disabled";
hsi2c_1: i2c@10900000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10900000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c1_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_1: serial@10900000 {
compatible = "google,gs101-uart";
reg = <0x10900000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart1_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_1: spi@10900000 {
compatible = "google,gs101-spi";
reg = <0x10900000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi1_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi2: usi@109100c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109100c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1004>;
status = "disabled";
hsi2c_2: i2c@10910000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10910000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c2_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_2: serial@10910000 {
compatible = "google,gs101-uart";
reg = <0x10910000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart2_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_2: spi@10910000 {
compatible = "google,gs101-spi";
reg = <0x10910000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi2_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi3: usi@109200c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109200c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1008>;
status = "disabled";
hsi2c_3: i2c@10920000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10920000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c3_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_3: serial@10920000 {
compatible = "google,gs101-uart";
reg = <0x10920000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart3_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_3: spi@10920000 {
compatible = "google,gs101-spi";
reg = <0x10920000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi3_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi4: usi@109300c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109300c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x100c>;
status = "disabled";
hsi2c_4: i2c@10930000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10930000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c4_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_4: serial@10930000 {
compatible = "google,gs101-uart";
reg = <0x10930000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart4_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_4: spi@10930000 {
compatible = "google,gs101-spi";
reg = <0x10930000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi4_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi5: usi@109400c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109400c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1010>;
status = "disabled";
hsi2c_5: i2c@10940000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10940000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c5_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_5: serial@10940000 {
compatible = "google,gs101-uart";
reg = <0x10940000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart5_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_5: spi@10940000 {
compatible = "google,gs101-spi";
reg = <0x10940000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi5_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi6: usi@109500c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109500c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1014>;
status = "disabled";
hsi2c_6: i2c@10950000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10950000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c6_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_6: serial@10950000 {
compatible = "google,gs101-uart";
reg = <0x10950000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart6_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_6: spi@10950000 {
compatible = "google,gs101-spi";
reg = <0x10950000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi6_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi7: usi@109600c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109600c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1018>;
status = "disabled";
hsi2c_7: i2c@10960000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10960000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c7_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_7: serial@10960000 {
compatible = "google,gs101-uart";
reg = <0x10960000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart7_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_7: spi@10960000 {
compatible = "google,gs101-spi";
reg = <0x10960000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi7_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi8: usi@109700c0 {
compatible = "google,gs101-usi",
"samsung,exynos850-usi";
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109700c0 0x20>;
ranges;
#address-cells = <1>;
@ -393,18 +777,44 @@
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c8_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
pinctrl-0 = <&hsi2c8_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_8: serial@10970000 {
compatible = "google,gs101-uart";
reg = <0x10970000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart8_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_8: spi@10970000 {
compatible = "google,gs101-spi";
reg = <0x10970000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi8_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi_uart: usi@10a000c0 {
compatible = "google,gs101-usi",
"samsung,exynos850-usi";
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10a000c0 0x20>;
ranges;
#address-cells = <1>;
@ -419,16 +829,72 @@
serial_0: serial@10a00000 {
compatible = "google,gs101-uart";
reg = <0x10a00000 0xc0>;
interrupts = <GIC_SPI 634
IRQ_TYPE_LEVEL_HIGH 0>;
interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
pinctrl-0 = <&uart0_bus>;
pinctrl-names = "default";
samsung,uart-fifosize = <256>;
status = "disabled";
};
};
usi14: usi@10a200c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10a200c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1028>;
status = "disabled";
hsi2c_14: i2c@10a20000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10a20000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c14_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_14: serial@10a20000 {
compatible = "google,gs101-uart";
reg = <0x10a20000 0xc0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart14_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_14: spi@10a20000 {
compatible = "google,gs101-spi";
reg = <0x10a20000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi14_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
cmu_peric1: clock-controller@10c00000 {
compatible = "google,gs101-cmu-peric1";
reg = <0x10c00000 0x4000>;
@ -451,9 +917,228 @@
interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
};
usi0: usi@10d100c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d100c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1000>;
status = "disabled";
hsi2c_0: i2c@10d10000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10d10000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c0_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_usi0: serial@10d10000 {
compatible = "google,gs101-uart";
reg = <0x10d10000 0xc0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart0_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_0: spi@10d10000 {
compatible = "google,gs101-spi";
reg = <0x10d10000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi0_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi9: usi@10d200c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d200c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1004>;
status = "disabled";
hsi2c_9: i2c@10d20000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10d20000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c9_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_9: serial@10d20000 {
compatible = "google,gs101-uart";
reg = <0x10d20000 0xc0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart9_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_9: spi@10d20000 {
compatible = "google,gs101-spi";
reg = <0x10d20000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi9_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi10: usi@10d300c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d300c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1008>;
status = "disabled";
hsi2c_10: i2c@10d30000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10d30000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c10_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_10: serial@10d30000 {
compatible = "google,gs101-uart";
reg = <0x10d30000 0xc0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart10_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_10: spi@10d30000 {
compatible = "google,gs101-spi";
reg = <0x10d30000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi10_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi11: usi@10d400c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d400c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x100c>;
status = "disabled";
hsi2c_11: i2c@10d40000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10d40000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c11_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_11: serial@10d40000 {
compatible = "google,gs101-uart";
reg = <0x10d40000 0xc0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart11_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_11: spi@10d40000 {
compatible = "google,gs101-spi";
reg = <0x10d40000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi11_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi12: usi@10d500c0 {
compatible = "google,gs101-usi",
"samsung,exynos850-usi";
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d500c0 0x20>;
ranges;
#address-cells = <1>;
@ -471,11 +1156,93 @@
interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&hsi2c12_bus>;
pinctrl-names = "default";
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>;
clock-names = "hsi2c", "hsi2c_pclk";
pinctrl-0 = <&hsi2c12_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_12: serial@10d50000 {
compatible = "google,gs101-uart";
reg = <0x10d50000 0xc0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart12_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_12: spi@10d50000 {
compatible = "google,gs101-spi";
reg = <0x10d50000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi12_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi13: usi@10d600c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d600c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1014>;
status = "disabled";
hsi2c_13: i2c@10d60000 {
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10d60000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c13_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_13: serial@10d60000 {
compatible = "google,gs101-uart";
reg = <0x10d60000 0xc0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart13_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_13: spi@10d60000 {
compatible = "google,gs101-spi";
reg = <0x10d60000 0x30>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
clock-names = "spi", "spi_busclk0";
interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&spi13_bus>;
pinctrl-names = "default";
status = "disabled";
};
};