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ath9k_hw: update EEPROM data structure for AR9280

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Adds read access for the 5 GHz fast clock flag

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Felix Fietkau 2010-04-26 15:04:34 -04:00 committed by John W. Linville
parent e55537240f
commit 5b75d0fca5
2 changed files with 4 additions and 1 deletions
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3
drivers/net/wireless/ath/ath9k/eeprom.h
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@ -300,7 +300,8 @@ struct base_eep_header {
u32 binBuildNumber;
u8 deviceType;
u8 pwdclkind;
u8 futureBase_1[2];
u8 fastClk5g;
u8 divChain;
u8 rxGainType;
u8 dacHiPwrMode_5G;
u8 openLoopPwrCntl;

2
drivers/net/wireless/ath/ath9k/eeprom_def.c
View File

@ -274,6 +274,8 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
return pBase->txMask;
case EEP_RX_MASK:
return pBase->rxMask;
case EEP_FSTCLK_5G:
return pBase->fastClk5g;
case EEP_RXGAIN_TYPE:
return pBase->rxGainType;
case EEP_TXGAIN_TYPE: