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drm/i915/gtt: Mark TLBS dirty for gen8+

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When we touch gen8+ page maps, mark them dirty like we
do with previous gens.

v2: Update comment (Joonas)

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Mika Kuoppala 2015-06-25 18:35:03 +03:00 committed by Daniel Vetter
parent 9e2ee2dd04
commit 5b7e4c9ce1
1 changed files with 12 additions and 10 deletions
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22
drivers/gpu/drm/i915/i915_gem_gtt.c
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@ -831,6 +831,16 @@ err_out:
return -ENOMEM;
}
/* PDE TLBs are a pain to invalidate on GEN8+. When we modify
* the page table structures, we mark them dirty so that
* context switching/execlist queuing code takes extra steps
* to ensure that tlbs are flushed.
*/
static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt)
{
ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.dev)->ring_mask;
}
static int gen8_alloc_va_range(struct i915_address_space *vm,
uint64_t start,
uint64_t length)
@ -916,6 +926,7 @@ static int gen8_alloc_va_range(struct i915_address_space *vm,
}
free_gen8_temp_bitmaps(new_page_dirs, new_page_tables);
mark_tlbs_dirty(ppgtt);
return 0;
err_out:
@ -928,6 +939,7 @@ err_out:
unmap_and_free_pd(ppgtt->pdp.page_directory[pdpe], vm->dev);
free_gen8_temp_bitmaps(new_page_dirs, new_page_tables);
mark_tlbs_dirty(ppgtt);
return ret;
}
@ -1272,16 +1284,6 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
kunmap_atomic(pt_vaddr);
}
/* PDE TLBs are a pain invalidate pre GEN8. It requires a context reload. If we
* are switching between contexts with the same LRCA, we also must do a force
* restore.
*/
static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt)
{
/* If current vm != vm, */
ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.dev)->ring_mask;
}
static void gen6_initialize_pt(struct i915_address_space *vm,
struct i915_page_table *pt)
{