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drm/amdgpu: save list length when fence is signaled

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update the list first to avoid redundant checks.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
This commit is contained in:
Chunming Zhou 2017-08-11 09:34:33 +08:00 committed by Alex Deucher
parent 3c848bb38a
commit 5b7f8404b2
1 changed files with 6 additions and 7 deletions
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13
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
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@ -244,6 +244,12 @@ struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
struct dma_fence *f = e->fence;
struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
if (dma_fence_is_signaled(f)) {
hash_del(&e->node);
dma_fence_put(f);
kmem_cache_free(amdgpu_sync_slab, e);
continue;
}
if (ring && s_fence) {
/* For fences from the same ring it is sufficient
* when they are scheduled.
@ -256,13 +262,6 @@ struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
}
}
if (dma_fence_is_signaled(f)) {
hash_del(&e->node);
dma_fence_put(f);
kmem_cache_free(amdgpu_sync_slab, e);
continue;
}
return f;
}