dmaengine: xilinx: xdma: Fix wrong offsets in the buffers addresses in dma descriptor
The addition of interleaved transfers slightly changed the way addresses inside DMA descriptors are derived, breaking cyclic transfers. Fixes: 3e184e64c2e5 ("dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com> Link: https://lore.kernel.org/r/20240327-digigram-xdma-fixes-v1-1-45f4a52c0283@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -704,7 +704,7 @@ xdma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t address,
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desc_num = 0;
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for (i = 0; i < periods; i++) {
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desc_num += xdma_fill_descs(sw_desc, *src, *dst, period_size, desc_num);
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addr += i * period_size;
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addr += period_size;
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}
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tx_desc = vchan_tx_prep(&xdma_chan->vchan, &sw_desc->vdesc, flags);
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