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media: camss: csiphy: Ensure clock mux config is done before the rest

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Add a write memory barier after clock mux config and before the rest
of the csiphy config.

Signed-off-by: Todor Tomov <todor.tomov@linaro.org>
Signed-off-by: Hans Verkuil <hansverk@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Todor Tomov 2018-07-25 12:38:16 -04:00 committed by Mauro Carvalho Chehab
parent 2004fc09b3
commit 5ba913b3fc
1 changed files with 1 additions and 0 deletions
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drivers/media/platform/qcom/camss/camss-csiphy.c
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@ -364,6 +364,7 @@ static int csiphy_stream_on(struct csiphy_device *csiphy)
val |= cfg->csid_id; val |= cfg->csid_id;
} }
writel_relaxed(val, csiphy->base_clk_mux); writel_relaxed(val, csiphy->base_clk_mux);
wmb();
writel_relaxed(0x1, csiphy->base + writel_relaxed(0x1, csiphy->base +
CAMSS_CSI_PHY_GLBL_T_INIT_CFG0); CAMSS_CSI_PHY_GLBL_T_INIT_CFG0);