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drm/amd/display: Promote DAL to 3.2.259

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Summary:

- Enable DCN35 physymclk root clock gating
- Fix DP automation test pattern bug
- Disable OTG for mode timing switch on DCN35
- Refactor DML2
- Revert Fix handling duplicate planes on one stream
- Revert Enable DCN clock gating
- Implement cursor P-State allow for SubVP
- Optimize pipe otg allocation
- Save and restore mall state while switching from ODM to Subvp

Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Aric Cyr 2023-10-29 21:22:37 -04:00 committed by Alex Deucher
parent fecbaa0a79
commit 5c10147464
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/dc.h
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@ -49,7 +49,7 @@ struct aux_payload;
struct set_config_cmd_payload;
struct dmub_notification;
#define DC_VER "3.2.258"
#define DC_VER "3.2.259"
#define MAX_SURFACES 3
#define MAX_PLANES 6