DMA40 fixes for earlier submitted driver patches:
- Fix various error path and sparse bugs in the DMA40 driver - Fix various compile errors in the ux500 crypto driver (dependent on the DMA40 changes). -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAABAgAGBQJRyZWSAAoJEEEQszewGV1zIVYP/0XONEdiMpaqtiIkCqrFPytV vb/9bmkPpokVbsp0HiGlUSPFuYsoDRkMVp/ZG7TDvTnYyIZ7wVSempbKxnEp0Y6B 5uByzfCHgnacAiC05M8nFsgwYEXUl8nV3smvrpJerWn5OxEIvxtfrH3FDtFGpmxp B6cBZhcmTrtRyXUS6GZouuX5shFo3Jv5Bo1zAUi1tCulOfmZkUogT9BVjrg57C14 7ZVuduSHPTSKElIvucTsjL9UmR2XQm9ihdNRMj8BD1oL7xfLTKUhaMTDlQ79cBwA rBUpIM10pusc3qfZiaqZeUVBXtv+vPvlgR/lwoXc7mf6JOTOgL8X/il3jrJAsGre jjBn3qHGLa0hPra04cmPEp53+TC7b7QbNM7AqrBvU0OSQAT9N2gX70GlsDJo012/ fTTfnUg93hxKG/+0myEIfwdmLo5hq1xJA46B1XGXRet7O/OaTeiEgMzRnT3W+gmc N8tjepoF7XtqaRLz0D8jH/LNU8yB5GF48CKQUi9HCX+pkUUDg4CINJPgIML4GfkH rhb00f9IcyvzdmJIvtdQcIJ94jGbiZyQh9Rz6CmdlxjWCCVMTzXeFfuC9+uTjf/4 mv9p9XKtRjoEUtLRxOXtIS04+EzbhVL65vf1H/WVcKfHJL1IDZjvg9rWG6drrZi6 Pxlw6FvUo5DDrfOe6NnI =sHkJ -----END PGP SIGNATURE----- Merge tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers From Linus Walleij: DMA40 fixes for earlier submitted driver patches: - Fix various error path and sparse bugs in the DMA40 driver - Fix various compile errors in the ux500 crypto driver (dependent on the DMA40 changes). * tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: crypto: ux500: use dmaengine_submit API crypto: ux500: use dmaengine_prep_slave_sg API crypto: ux500: use dmaengine_device_control API crypto: ux500/crypt: add missing __iomem qualifiers crypto: ux500/hash: add missing static qualifiers crypto: ux500/hash: use readl on iomem addresses dmaengine: ste_dma40: Declare memcpy config as static dmaengine: ste_dma40: fix error return code in d40_probe() Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
5c913a9a97
@ -291,7 +291,7 @@ void cryp_save_device_context(struct cryp_device_data *device_data,
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int cryp_mode)
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{
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enum cryp_algo_mode algomode;
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struct cryp_register *src_reg = device_data->base;
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struct cryp_register __iomem *src_reg = device_data->base;
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struct cryp_config *config =
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(struct cryp_config *)device_data->current_ctx;
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@ -349,7 +349,7 @@ void cryp_save_device_context(struct cryp_device_data *device_data,
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void cryp_restore_device_context(struct cryp_device_data *device_data,
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struct cryp_device_context *ctx)
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{
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struct cryp_register *reg = device_data->base;
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struct cryp_register __iomem *reg = device_data->base;
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struct cryp_config *config =
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(struct cryp_config *)device_data->current_ctx;
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@ -553,10 +553,10 @@ static int cryp_set_dma_transfer(struct cryp_ctx *ctx,
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dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer "
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"(TO_DEVICE)", __func__);
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desc = channel->device->device_prep_slave_sg(channel,
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ctx->device->dma.sg_src,
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ctx->device->dma.sg_src_len,
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direction, DMA_CTRL_ACK, NULL);
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desc = dmaengine_prep_slave_sg(channel,
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ctx->device->dma.sg_src,
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ctx->device->dma.sg_src_len,
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direction, DMA_CTRL_ACK);
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break;
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case DMA_FROM_DEVICE:
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@ -577,12 +577,12 @@ static int cryp_set_dma_transfer(struct cryp_ctx *ctx,
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dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer "
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"(FROM_DEVICE)", __func__);
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desc = channel->device->device_prep_slave_sg(channel,
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ctx->device->dma.sg_dst,
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ctx->device->dma.sg_dst_len,
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direction,
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DMA_CTRL_ACK |
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DMA_PREP_INTERRUPT, NULL);
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desc = dmaengine_prep_slave_sg(channel,
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ctx->device->dma.sg_dst,
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ctx->device->dma.sg_dst_len,
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direction,
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DMA_CTRL_ACK |
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DMA_PREP_INTERRUPT);
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desc->callback = cryp_dma_out_callback;
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desc->callback_param = ctx;
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@ -594,7 +594,7 @@ static int cryp_set_dma_transfer(struct cryp_ctx *ctx,
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return -EFAULT;
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}
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cookie = desc->tx_submit(desc);
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cookie = dmaengine_submit(desc);
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dma_async_issue_pending(channel);
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return 0;
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@ -607,12 +607,12 @@ static void cryp_dma_done(struct cryp_ctx *ctx)
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dev_dbg(ctx->device->dev, "[%s]: ", __func__);
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chan = ctx->device->dma.chan_mem2cryp;
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chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
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dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
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dma_unmap_sg(chan->device->dev, ctx->device->dma.sg_src,
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ctx->device->dma.sg_src_len, DMA_TO_DEVICE);
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chan = ctx->device->dma.chan_cryp2mem;
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chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
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dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
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dma_unmap_sg(chan->device->dev, ctx->device->dma.sg_dst,
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ctx->device->dma.sg_dst_len, DMA_FROM_DEVICE);
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}
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@ -180,9 +180,9 @@ static int hash_set_dma_transfer(struct hash_ctx *ctx, struct scatterlist *sg,
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dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer "
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"(TO_DEVICE)", __func__);
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desc = channel->device->device_prep_slave_sg(channel,
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desc = dmaengine_prep_slave_sg(channel,
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ctx->device->dma.sg, ctx->device->dma.sg_len,
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direction, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL);
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direction, DMA_CTRL_ACK | DMA_PREP_INTERRUPT);
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if (!desc) {
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dev_err(ctx->device->dev,
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"[%s]: device_prep_slave_sg() failed!", __func__);
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@ -192,7 +192,7 @@ static int hash_set_dma_transfer(struct hash_ctx *ctx, struct scatterlist *sg,
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desc->callback = hash_dma_callback;
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desc->callback_param = ctx;
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cookie = desc->tx_submit(desc);
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cookie = dmaengine_submit(desc);
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dma_async_issue_pending(channel);
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return 0;
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@ -203,7 +203,7 @@ static void hash_dma_done(struct hash_ctx *ctx)
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struct dma_chan *chan;
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chan = ctx->device->dma.chan_mem2hash;
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chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
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dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
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dma_unmap_sg(chan->device->dev, ctx->device->dma.sg,
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ctx->device->dma.sg_len, DMA_TO_DEVICE);
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@ -473,12 +473,12 @@ static void hash_hw_write_key(struct hash_device_data *device_data,
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HASH_SET_DIN(&word, nwords);
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}
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while (device_data->base->str & HASH_STR_DCAL_MASK)
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while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
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cpu_relax();
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HASH_SET_DCAL;
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while (device_data->base->str & HASH_STR_DCAL_MASK)
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while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
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cpu_relax();
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}
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@ -661,7 +661,7 @@ static void hash_messagepad(struct hash_device_data *device_data,
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if (index_bytes)
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HASH_SET_DIN(message, nwords);
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while (device_data->base->str & HASH_STR_DCAL_MASK)
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while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
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cpu_relax();
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/* num_of_bytes == 0 => NBLW <- 0 (32 bits valid in DATAIN) */
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@ -676,7 +676,7 @@ static void hash_messagepad(struct hash_device_data *device_data,
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(int)(readl_relaxed(&device_data->base->str) &
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HASH_STR_NBLW_MASK));
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while (device_data->base->str & HASH_STR_DCAL_MASK)
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while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
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cpu_relax();
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}
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@ -776,7 +776,7 @@ void hash_begin(struct hash_device_data *device_data, struct hash_ctx *ctx)
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/* HW and SW initializations */
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/* Note: there is no need to initialize buffer and digest members */
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while (device_data->base->str & HASH_STR_DCAL_MASK)
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while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
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cpu_relax();
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/*
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@ -792,8 +792,7 @@ void hash_begin(struct hash_device_data *device_data, struct hash_ctx *ctx)
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HASH_CLEAR_BITS(&device_data->base->str, HASH_STR_NBLW_MASK);
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}
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int hash_process_data(
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struct hash_device_data *device_data,
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static int hash_process_data(struct hash_device_data *device_data,
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struct hash_ctx *ctx, struct hash_req_ctx *req_ctx,
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int msg_length, u8 *data_buffer, u8 *buffer, u8 *index)
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{
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@ -962,7 +961,7 @@ static int hash_dma_final(struct ahash_request *req)
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wait_for_completion(&ctx->device->dma.complete);
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hash_dma_done(ctx);
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while (device_data->base->str & HASH_STR_DCAL_MASK)
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while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
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cpu_relax();
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if (ctx->config.oper_mode == HASH_OPER_MODE_HMAC && ctx->key) {
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@ -992,7 +991,7 @@ out:
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* hash_hw_final - The final hash calculation function
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* @req: The hash request for the job.
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*/
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int hash_hw_final(struct ahash_request *req)
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static int hash_hw_final(struct ahash_request *req)
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{
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int ret = 0;
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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@ -1060,7 +1059,7 @@ int hash_hw_final(struct ahash_request *req)
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req_ctx->state.index);
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} else {
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HASH_SET_DCAL;
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while (device_data->base->str & HASH_STR_DCAL_MASK)
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while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
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cpu_relax();
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}
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@ -1189,7 +1188,7 @@ int hash_resume_state(struct hash_device_data *device_data,
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temp_cr = device_state->temp_cr;
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writel_relaxed(temp_cr & HASH_CR_RESUME_MASK, &device_data->base->cr);
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if (device_data->base->cr & HASH_CR_MODE_MASK)
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if (readl(&device_data->base->cr) & HASH_CR_MODE_MASK)
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hash_mode = HASH_OPER_MODE_HMAC;
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else
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hash_mode = HASH_OPER_MODE_HASH;
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@ -1233,7 +1232,7 @@ int hash_save_state(struct hash_device_data *device_data,
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* actually makes sure that there isn't any ongoing calculation in the
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* hardware.
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*/
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while (device_data->base->str & HASH_STR_DCAL_MASK)
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while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
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cpu_relax();
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temp_cr = readl_relaxed(&device_data->base->cr);
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@ -1242,7 +1241,7 @@ int hash_save_state(struct hash_device_data *device_data,
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device_state->din_reg = readl_relaxed(&device_data->base->din);
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if (device_data->base->cr & HASH_CR_MODE_MASK)
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if (readl(&device_data->base->cr) & HASH_CR_MODE_MASK)
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hash_mode = HASH_OPER_MODE_HMAC;
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else
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hash_mode = HASH_OPER_MODE_HASH;
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@ -78,7 +78,7 @@ static int dma40_memcpy_channels[] = {
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};
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/* Default configuration for physcial memcpy */
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struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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static struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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.mode = STEDMA40_MODE_PHYSICAL,
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.dir = DMA_MEM_TO_MEM,
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@ -92,7 +92,7 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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};
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/* Default configuration for logical memcpy */
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struct stedma40_chan_cfg dma40_memcpy_conf_log = {
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static struct stedma40_chan_cfg dma40_memcpy_conf_log = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = DMA_MEM_TO_MEM,
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@ -3537,7 +3537,6 @@ static int __init d40_probe(struct platform_device *pdev)
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{
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struct stedma40_platform_data *plat_data = pdev->dev.platform_data;
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struct device_node *np = pdev->dev.of_node;
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int err;
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int ret = -ENOENT;
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struct d40_base *base = NULL;
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struct resource *res = NULL;
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@ -3649,6 +3648,7 @@ static int __init d40_probe(struct platform_device *pdev)
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base->lcpa_regulator = regulator_get(base->dev, "lcla_esram");
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if (IS_ERR(base->lcpa_regulator)) {
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d40_err(&pdev->dev, "Failed to get lcpa_regulator\n");
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ret = PTR_ERR(base->lcpa_regulator);
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base->lcpa_regulator = NULL;
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goto failure;
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}
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@ -3664,13 +3664,13 @@ static int __init d40_probe(struct platform_device *pdev)
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}
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base->initialized = true;
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err = d40_dmaengine_init(base, num_reserved_chans);
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if (err)
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ret = d40_dmaengine_init(base, num_reserved_chans);
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if (ret)
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goto failure;
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base->dev->dma_parms = &base->dma_parms;
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err = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE);
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if (err) {
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ret = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE);
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if (ret) {
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d40_err(&pdev->dev, "Failed to set dma max seg size\n");
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goto failure;
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}
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@ -3678,8 +3678,8 @@ static int __init d40_probe(struct platform_device *pdev)
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d40_hw_init(base);
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if (np) {
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err = of_dma_controller_register(np, d40_xlate, NULL);
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if (err && err != -ENODEV)
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ret = of_dma_controller_register(np, d40_xlate, NULL);
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if (ret)
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dev_err(&pdev->dev,
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"could not register of_dma_controller\n");
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}
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