drm/amdgpu: add new member hw_supported
Currently, it is not clear how ras is supported. Both software and hardware can set the supported. That is confusing. Fix it by adding new member hw_supported. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -469,7 +469,9 @@ static struct ras_manager *amdgpu_ras_find_obj(struct amdgpu_device *adev,
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static int amdgpu_ras_is_feature_allowed(struct amdgpu_device *adev,
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struct ras_common_if *head)
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{
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return amdgpu_ras_enable && (amdgpu_ras_mask & BIT(head->block));
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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return con->hw_supported & BIT(head->block);
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}
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static int amdgpu_ras_is_feature_enabled(struct amdgpu_device *adev,
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@ -490,6 +492,12 @@ static int __amdgpu_ras_feature_enable(struct amdgpu_device *adev,
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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struct ras_manager *obj = amdgpu_ras_find_obj(adev, head);
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/* If hardware does not support ras, then do not create obj.
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* But if hardware support ras, we can create the obj.
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* Ras framework checks con->hw_supported to see if it need do
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* corresponding initialization.
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* IP checks con->support to see if it need disable ras.
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*/
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if (!amdgpu_ras_is_feature_allowed(adev, head))
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return 0;
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if (!(!!enable ^ !!amdgpu_ras_is_feature_enabled(adev, head)))
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@ -1334,27 +1342,36 @@ static int amdgpu_ras_recovery_fini(struct amdgpu_device *adev)
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}
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/* recovery end */
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static uint32_t amdgpu_ras_check_supported(struct amdgpu_device *adev)
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/*
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* check hardware's ras ability which will be saved in hw_supported.
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* if hardware does not support ras, we can skip some ras initializtion and
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* forbid some ras operations from IP.
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* if software itself, say boot parameter, limit the ras ability. We still
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* need allow IP do some limited operations, like disable. In such case,
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* we have to initialize ras as normal. but need check if operation is
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* allowed or not in each function.
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*/
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static void amdgpu_ras_check_supported(struct amdgpu_device *adev,
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uint32_t *hw_supported, uint32_t *supported)
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{
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uint32_t supported = 0;
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*hw_supported = 0;
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*supported = 0;
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if (amdgpu_ras_enable == 0 ||
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amdgpu_sriov_vf(adev) ||
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if (amdgpu_sriov_vf(adev) ||
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adev->asic_type != CHIP_VEGA20)
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return 0;
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return;
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if (amdgpu_atomfirmware_mem_ecc_supported(adev) ||
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amdgpu_atomfirmware_sram_ecc_supported(adev)) {
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supported = AMDGPU_RAS_BLOCK_MASK;
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}
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amdgpu_atomfirmware_sram_ecc_supported(adev))
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*hw_supported = AMDGPU_RAS_BLOCK_MASK;
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return supported & amdgpu_ras_mask;
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*supported = amdgpu_ras_enable == 0 ?
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0 : *hw_supported & amdgpu_ras_mask;
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}
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int amdgpu_ras_init(struct amdgpu_device *adev)
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{
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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uint32_t supported = amdgpu_ras_check_supported(adev);
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if (con)
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return 0;
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@ -1369,7 +1386,8 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
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amdgpu_ras_set_context(adev, con);
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con->supported = supported;
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amdgpu_ras_check_supported(adev, &con->hw_supported,
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&con->supported);
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con->features = 0;
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INIT_LIST_HEAD(&con->head);
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@ -81,6 +81,9 @@ typedef int (*ras_ih_cb)(struct amdgpu_device *adev,
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struct amdgpu_ras {
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/* ras infrastructure */
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/* for ras itself. */
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uint32_t hw_supported;
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/* for IP to check its ras ability. */
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uint32_t supported;
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uint32_t features;
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struct list_head head;
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