ARM: dts: rockchip: Add Sonoff iHost Smart Home Hub
Sonoff iHost is gateway device designed to provide a Smart Home Hub, it is based on Rockchip RV1126. There is also a version with 2GB RAM based off the RV1109 dual core SoC. Features: - Rockchip RV1126 - 4GB DDR4 - 8GB eMMC - microSD slot - RMII Ethernet PHY - 1x USB 2.0 Host - 1x USB 2.0 OTG - Realtek RTL8723DS WiFi/BT - EFR32MG21 Silabs Zigbee radio - Speaker/Microphone This patch adds the initial device tree for this device, it is largely based off the device trees for mainline Edgeble Neu2 and downstream Rockchip rv1126-evb-v13 configs. It has been adapted with relevant peripheral and GPIO pins for the iHost. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-8-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
parent
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commit
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@ -2,7 +2,9 @@
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dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1108-elgin-r1.dtb \
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rv1108-evb.dtb \
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rv1109-sonoff-ihost.dtb \
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rv1126-edgeble-neu2-io.dtb \
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rv1126-sonoff-ihost.dtb \
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rk3036-evb.dtb \
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rk3036-kylin.dtb \
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rk3066a-bqcurie2.dtb \
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21
arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts
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21
arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts
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@ -0,0 +1,21 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1109.dtsi"
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#include "rv1126-sonoff-ihost.dtsi"
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/ {
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model = "Sonoff iHost 2G";
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compatible = "itead,sonoff-ihost", "rockchip,rv1109";
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu1 {
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cpu-supply = <&vdd_arm>;
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};
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29
arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts
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arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts
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@ -0,0 +1,29 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1126.dtsi"
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#include "rv1126-sonoff-ihost.dtsi"
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/ {
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model = "Sonoff iHost 4G";
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compatible = "itead,sonoff-ihost", "rockchip,rv1126";
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu1 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu2 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu3 {
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cpu-supply = <&vdd_arm>;
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};
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404
arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi
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arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi
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@ -0,0 +1,404 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
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*/
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/ {
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aliases {
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ethernet0 = &gmac;
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mmc0 = &emmc;
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};
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chosen {
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stdout-path = "serial2:1500000n8";
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};
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vcc5v0_sys: regulator-vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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sdio_pwrseq: pwrseq-sdio {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk809 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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reset-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
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};
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};
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>;
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rockchip,default-sample-phase = <90>;
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vmmc-supply = <&vcc_3v3>;
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vqmmc-supply = <&vcc_1v8>;
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <400000>;
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status = "okay";
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <1>;
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l>;
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rockchip,system-power-controller;
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wakeup-source;
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vcc1-supply = <&vcc5v0_sys>;
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vcc2-supply = <&vcc5v0_sys>;
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vcc3-supply = <&vcc5v0_sys>;
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vcc4-supply = <&vcc5v0_sys>;
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vcc5-supply = <&vcc_buck5>;
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vcc6-supply = <&vcc_buck5>;
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vcc7-supply = <&vcc5v0_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc5v0_sys>;
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regulators {
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vdd_npu_vepu: DCDC_REG1 {
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regulator-name = "vdd_npu_vepu";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <650000>;
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regulator-max-microvolt = <950000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_arm: DCDC_REG2 {
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regulator-name = "vdd_arm";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc3v3_sys: DCDC_REG4 {
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc_buck5: DCDC_REG5 {
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regulator-name = "vcc_buck5";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <2200000>;
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regulator-max-microvolt = <2200000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <2200000>;
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};
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};
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vcc_0v8: LDO_REG1 {
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regulator-name = "vcc_0v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc1v8_pmu: LDO_REG2 {
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regulator-name = "vcc1v8_pmu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vdd0v8_pmu: LDO_REG3 {
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regulator-name = "vcc0v8_pmu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <800000>;
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};
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};
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vcc_1v8: LDO_REG4 {
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc_dovdd: LDO_REG5 {
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regulator-name = "vcc_dovdd";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_dvdd: LDO_REG6 {
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regulator-name = "vcc_dvdd";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_avdd: LDO_REG7 {
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regulator-name = "vcc_avdd";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vccio_sd: LDO_REG8 {
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regulator-name = "vccio_sd";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_sd: LDO_REG9 {
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regulator-name = "vcc3v3_sd";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_5v0: SWITCH_REG1 {
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regulator-name = "vcc_5v0";
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};
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vcc_3v3: SWITCH_REG2 {
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <400000>;
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pcf8563: rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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#clock-cells = <0>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
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clock-output-names = "xin32k";
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};
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};
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&gmac {
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assigned-clocks = <&cru CLK_GMAC_SRC_M1>, <&cru CLK_GMAC_SRC>,
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<&cru CLK_GMAC_TX_RX>;
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assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>, <&cru CLK_GMAC_SRC_M1>,
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<&cru RMII_MODE_CLK>;
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assigned-clock-rates = <0>, <50000000>;
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clock_in_out = "output";
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phy-handle = <&phy>;
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phy-mode = "rmii";
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phy-supply = <&vcc_3v3>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmiim1_miim &rgmiim1_rxer &rgmiim1_bus2 &rgmiim1_mclkinout>;
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status = "okay";
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};
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&mdio {
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phy: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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pinctrl-names = "default";
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pinctrl-0 = <ð_phy_rst>;
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reset-active-low;
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reset-assert-us = <50000>;
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reset-deassert-us = <10000>;
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reset-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
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};
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};
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&pinctrl {
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ethernet {
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eth_phy_rst: eth-phy-rst {
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rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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bt {
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bt_enable: bt-enable {
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rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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bt_wake_dev: bt-wake-dev {
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rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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bt_wake_host: bt-wake-host {
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rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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pmic_int_l: pmic-int-l {
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rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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wifi {
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wifi_enable_h: wifi-enable-h {
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rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&pmu_io_domains {
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pmuio0-supply = <&vcc1v8_pmu>;
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pmuio1-supply = <&vcc3v3_sys>;
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vccio1-supply = <&vcc_1v8>;
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vccio2-supply = <&vccio_sd>;
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vccio3-supply = <&vcc_1v8>;
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vccio4-supply = <&vcc_dovdd>;
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vccio5-supply = <&vcc_1v8>;
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vccio6-supply = <&vcc_1v8>;
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vccio7-supply = <&vcc_dovdd>;
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status = "okay";
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};
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&saradc {
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vref-supply = <&vcc_1v8>;
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status = "okay";
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};
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&sdio {
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bus-width = <4>;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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max-frequency = <100000000>;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
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rockchip,default-sample-phase = <90>;
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sd-uhs-sdr104;
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vmmc-supply = <&vcc3v3_sys>;
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vqmmc-supply = <&vcc_1v8>;
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
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rockchip,default-sample-phase = <90>;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr104;
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vqmmc-supply = <&vccio_sd>;
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status = "okay";
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||||
};
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||||
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||||
&uart0 {
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||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer &uart0_ctsn &uart0_rtsn>;
|
||||
uart-has-rtscts;
|
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status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "realtek,rtl8723ds-bt";
|
||||
device-wake-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; /* BT_WAKE */
|
||||
enable-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; /* BT_RST */
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||||
host-wake-gpios = <&gpio1 RK_PC5 GPIO_ACTIVE_HIGH>; /* BT_WAKE_HOST */
|
||||
max-speed = <2000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&bt_enable>, <&bt_wake_dev>, <&bt_wake_host>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3m2_xfer>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4m2_xfer>;
|
||||
status = "okay";
|
||||
};
|
Loading…
x
Reference in New Issue
Block a user