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i.MX arm64 device tree for 6.8:

Browse Source 
- New board support: MBa93xxCA starter kit, LX2160A based MBLX2160A,
   Dimonoff Gateway EVK, Verdin i.MX8M based Mallow, and SKOV i.MX8MP revB.
 - A set of changes from Adam Ford to enable MIPI_DSI, overdrive mode and
   NPU support for Beacon i.MX8M boards.
 - A number of changes from Alexander Stein to add CCM interrupts for
   CCM, 'chassis-type' property, and enable VPU and LVDS display for
   TQ-Systems boards.
 - i.MX93 update for AUDIO, I3C, ANATOP and uSDHC.
 - A couple of changes from David Heidelberg to correct dt-schema check
   errors for 'fsl,tmu-calibration' and 'gpio-fan,speed-map'.
 - A bunch of nice dt-schema check fix-ups from Fabio Estevam.
 - A couple of debix-som update from Kieran Bingham adding heartbeat LED
   and CSI power regulators.
 - White-space cleanup from Krzysztof Kozlowski.
 - Add display support for imx8mn-bsh-smm-s2/pro board.
 - A series from Tim Harvey to add TPM support for i.MX8M Venice devices.
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Merge tag 'imx-dt64-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt

i.MX arm64 device tree for 6.8:

- New board support: MBa93xxCA starter kit, LX2160A based MBLX2160A,
  Dimonoff Gateway EVK, Verdin i.MX8M based Mallow, and SKOV i.MX8MP revB.
- A set of changes from Adam Ford to enable MIPI_DSI, overdrive mode and
  NPU support for Beacon i.MX8M boards.
- A number of changes from Alexander Stein to add CCM interrupts for
  CCM, 'chassis-type' property, and enable VPU and LVDS display for
  TQ-Systems boards.
- i.MX93 update for AUDIO, I3C, ANATOP and uSDHC.
- A couple of changes from David Heidelberg to correct dt-schema check
  errors for 'fsl,tmu-calibration' and 'gpio-fan,speed-map'.
- A bunch of nice dt-schema check fix-ups from Fabio Estevam.
- A couple of debix-som update from Kieran Bingham adding heartbeat LED
  and CSI power regulators.
- White-space cleanup from Krzysztof Kozlowski.
- Add display support for imx8mn-bsh-smm-s2/pro board.
- A series from Tim Harvey to add TPM support for i.MX8M Venice devices.

* tag 'imx-dt64-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (69 commits)
  arm64: dts: freescale: fix the schema check errors for fsl,tmu-calibration
  arm64: dts: freescale: imx8qxp: Disable dsp reserved memory by default
  arm64: dts: imx8qxp: Add VPU subsystem file
  arm64: dts: imx8qxp-mek: Move port under USB connector
  arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup
  arm64: dts: imx8mp-dhcom-pdk3: Describe the USB-C connector
  arm64: dts: imx8mn-var-som-symphony: Describe the USB-C connector
  arm64: dts: imx8mp-tqma8mpql-mba8mpxl: Fix USB connector description
  arm64: dts: imx8mp-venice: Fix USB connector description
  arm64: dts: imx8mp-verdin: Fix USB connector description
  arm64: dts: imx8dxl-ss-conn: Move clk_dummy out of USB node
  arm64: dts: imx8mn-evk: Move port under USB connector
  arm64: dts: imx8mm-evk: Move port under USB connector
  arm64: dts: freescale: introduce dimonoff-gateway-evk board
  arm64: dts: imx8m*-tqma8m*: Add chassis-type
  arm64: dts: imx8mn-beacon: Support overdrive mode
  arm64: dts: imx8mn: Enable Overdrive mode
  arm64: dts: imx8mm-beacon: Enable overdrive mode
  arm64: dts: imx8mm: Add optional overdrive DTSI
  arm64: dts: imx8mm: Reduce GPU to nominal speed
  ...

Link: https://lore.kernel.org/r/20231216064605.876196-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-12-21 16:43:31 +00:00
commit 5d9331b48d
75 changed files with 4313 additions and 376 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
arch/arm64/boot/dts/freescale/Makefile
View File

@ -53,6 +53,32 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-85bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb
fsl-lx2160a-tqmlx2160a-mblx2160a-12-11-x-dtbs := fsl-lx2160a-tqmlx2160a-mblx2160a.dtb \
fsl-lx2160a-tqmlx2160a-mblx2160a_12_x_x.dtbo \
fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x.dtbo
fsl-lx2160a-tqmlx2160a-mblx2160a-12-7-x-dtbs := fsl-lx2160a-tqmlx2160a-mblx2160a.dtb \
fsl-lx2160a-tqmlx2160a-mblx2160a_12_x_x.dtbo \
fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.dtbo
fsl-lx2160a-tqmlx2160a-mblx2160a-12-8-x-dtbs := fsl-lx2160a-tqmlx2160a-mblx2160a.dtb \
fsl-lx2160a-tqmlx2160a-mblx2160a_12_x_x.dtbo \
fsl-lx2160a-tqmlx2160a-mblx2160a_x_8_x.dtbo
fsl-lx2160a-tqmlx2160a-mblx2160a-14-7-x-dtbs := fsl-lx2160a-tqmlx2160a-mblx2160a.dtb \
fsl-lx2160a-tqmlx2160a-mblx2160a_14_x_x.dtbo \
fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.dtbo
fsl-lx2160a-tqmlx2160a-mblx2160a-14-8-x-dtbs := fsl-lx2160a-tqmlx2160a-mblx2160a.dtb \
fsl-lx2160a-tqmlx2160a-mblx2160a_14_x_x.dtbo \
fsl-lx2160a-tqmlx2160a-mblx2160a_x_8_x.dtbo
fsl-lx2160a-tqmlx2160a-mblx2160a-14-11-x-dtbs := fsl-lx2160a-tqmlx2160a-mblx2160a.dtb \
fsl-lx2160a-tqmlx2160a-mblx2160a_14_x_x.dtbo \
fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x.dtbo
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-12-11-x.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-12-8-x.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-12-7-x.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-11-x.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-8-x.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-7-x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb
@ -84,9 +110,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7904.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7905-0x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-mallow.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-yavia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-mallow.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-yavia.dtb
imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33-dtbs += imx8mm-tqma8mqml-mba8mx.dtb imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtbo
@ -95,9 +123,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-dimonoff-gateway-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr3l-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-rve-gateway.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb
@ -115,6 +145,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
@ -123,13 +156,17 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw7905-2x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-mallow.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-yavia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-mallow.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-yavia.dtb
imx8mp-tqma8mpql-mba8mpxl-lvds-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds.dtbo
imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl-lvds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb
@ -164,6 +201,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris-v2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo

74
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
View File

@ -307,46 +307,46 @@
reg = <0x0 0x1f00000 0x0 0x10000>;
interrupts = <0 33 0x4>;
fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x60062>;
fsl,tmu-calibration = <0x00000000 0x00000025
0x00000001 0x0000002c
0x00000002 0x00000032
0x00000003 0x00000039
0x00000004 0x0000003f
0x00000005 0x00000046
0x00000006 0x0000004c
0x00000007 0x00000053
0x00000008 0x00000059
0x00000009 0x0000005f
0x0000000a 0x00000066
0x0000000b 0x0000006c
fsl,tmu-calibration =
<0x00000000 0x00000025>,
<0x00000001 0x0000002c>,
<0x00000002 0x00000032>,
<0x00000003 0x00000039>,
<0x00000004 0x0000003f>,
<0x00000005 0x00000046>,
<0x00000006 0x0000004c>,
<0x00000007 0x00000053>,
<0x00000008 0x00000059>,
<0x00000009 0x0000005f>,
<0x0000000a 0x00000066>,
<0x0000000b 0x0000006c>,
0x00010000 0x00000026
0x00010001 0x0000002d
0x00010002 0x00000035
0x00010003 0x0000003d
0x00010004 0x00000045
0x00010005 0x0000004d
0x00010006 0x00000055
0x00010007 0x0000005d
0x00010008 0x00000065
0x00010009 0x0000006d
<0x00010000 0x00000026>,
<0x00010001 0x0000002d>,
<0x00010002 0x00000035>,
<0x00010003 0x0000003d>,
<0x00010004 0x00000045>,
<0x00010005 0x0000004d>,
<0x00010006 0x00000055>,
<0x00010007 0x0000005d>,
<0x00010008 0x00000065>,
<0x00010009 0x0000006d>,
0x00020000 0x00000026
0x00020001 0x00000030
0x00020002 0x0000003a
0x00020003 0x00000044
0x00020004 0x0000004e
0x00020005 0x00000059
0x00020006 0x00000063
<0x00020000 0x00000026>,
<0x00020001 0x00000030>,
<0x00020002 0x0000003a>,
<0x00020003 0x00000044>,
<0x00020004 0x0000004e>,
<0x00020005 0x00000059>,
<0x00020006 0x00000063>,
0x00030000 0x00000014
0x00030001 0x00000021
0x00030002 0x0000002e
0x00030003 0x0000003a
0x00030004 0x00000047
0x00030005 0x00000053
0x00030006 0x00000060>;
big-endian;
<0x00030000 0x00000014>,
<0x00030001 0x00000021>,
<0x00030002 0x0000002e>,
<0x00030003 0x0000003a>,
<0x00030004 0x00000047>,
<0x00030005 0x00000053>,
<0x00030006 0x00000060>;
#thermal-sensor-cells = <1>;
};

81
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
View File

@ -1026,49 +1026,50 @@
reg = <0x0 0x1f80000 0x0 0x10000>;
interrupts = <0 23 0x4>;
fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
fsl,tmu-calibration = <0x00000000 0x00000024
0x00000001 0x0000002b
0x00000002 0x00000031
0x00000003 0x00000038
0x00000004 0x0000003f
0x00000005 0x00000045
0x00000006 0x0000004c
0x00000007 0x00000053
0x00000008 0x00000059
0x00000009 0x00000060
0x0000000a 0x00000066
0x0000000b 0x0000006d
fsl,tmu-calibration =
<0x00000000 0x00000024>,
<0x00000001 0x0000002b>,
<0x00000002 0x00000031>,
<0x00000003 0x00000038>,
<0x00000004 0x0000003f>,
<0x00000005 0x00000045>,
<0x00000006 0x0000004c>,
<0x00000007 0x00000053>,
<0x00000008 0x00000059>,
<0x00000009 0x00000060>,
<0x0000000a 0x00000066>,
<0x0000000b 0x0000006d>,
0x00010000 0x0000001c
0x00010001 0x00000024
0x00010002 0x0000002c
0x00010003 0x00000035
0x00010004 0x0000003d
0x00010005 0x00000045
0x00010006 0x0000004d
0x00010007 0x00000055
0x00010008 0x0000005e
0x00010009 0x00000066
0x0001000a 0x0000006e
<0x00010000 0x0000001c>,
<0x00010001 0x00000024>,
<0x00010002 0x0000002c>,
<0x00010003 0x00000035>,
<0x00010004 0x0000003d>,
<0x00010005 0x00000045>,
<0x00010006 0x0000004d>,
<0x00010007 0x00000055>,
<0x00010008 0x0000005e>,
<0x00010009 0x00000066>,
<0x0001000a 0x0000006e>,
0x00020000 0x00000018
0x00020001 0x00000022
0x00020002 0x0000002d
0x00020003 0x00000038
0x00020004 0x00000043
0x00020005 0x0000004d
0x00020006 0x00000058
0x00020007 0x00000063
0x00020008 0x0000006e
<0x00020000 0x00000018>,
<0x00020001 0x00000022>,
<0x00020002 0x0000002d>,
<0x00020003 0x00000038>,
<0x00020004 0x00000043>,
<0x00020005 0x0000004d>,
<0x00020006 0x00000058>,
<0x00020007 0x00000063>,
<0x00020008 0x0000006e>,
0x00030000 0x00000010
0x00030001 0x0000001c
0x00030002 0x00000029
0x00030003 0x00000036
0x00030004 0x00000042
0x00030005 0x0000004f
0x00030006 0x0000005b
0x00030007 0x00000068>;
<0x00030000 0x00000010>,
<0x00030001 0x0000001c>,
<0x00030002 0x00000029>,
<0x00030003 0x00000036>,
<0x00030004 0x00000042>,
<0x00030005 0x0000004f>,
<0x00030006 0x0000005b>,
<0x00030007 0x00000068>;
little-endian;
#thermal-sensor-cells = <1>;
};

75
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
View File

@ -447,46 +447,47 @@
reg = <0x0 0x1f00000 0x0 0x10000>;
interrupts = <0 33 0x4>;
fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
fsl,tmu-calibration = <0x00000000 0x00000023
0x00000001 0x0000002a
0x00000002 0x00000031
0x00000003 0x00000037
0x00000004 0x0000003e
0x00000005 0x00000044
0x00000006 0x0000004b
0x00000007 0x00000051
0x00000008 0x00000058
0x00000009 0x0000005e
0x0000000a 0x00000065
0x0000000b 0x0000006b
fsl,tmu-calibration =
<0x00000000 0x00000023>,
<0x00000001 0x0000002a>,
<0x00000002 0x00000031>,
<0x00000003 0x00000037>,
<0x00000004 0x0000003e>,
<0x00000005 0x00000044>,
<0x00000006 0x0000004b>,
<0x00000007 0x00000051>,
<0x00000008 0x00000058>,
<0x00000009 0x0000005e>,
<0x0000000a 0x00000065>,
<0x0000000b 0x0000006b>,
0x00010000 0x00000023
0x00010001 0x0000002b
0x00010002 0x00000033
0x00010003 0x0000003b
0x00010004 0x00000043
0x00010005 0x0000004b
0x00010006 0x00000054
0x00010007 0x0000005c
0x00010008 0x00000064
0x00010009 0x0000006c
<0x00010000 0x00000023>,
<0x00010001 0x0000002b>,
<0x00010002 0x00000033>,
<0x00010003 0x0000003b>,
<0x00010004 0x00000043>,
<0x00010005 0x0000004b>,
<0x00010006 0x00000054>,
<0x00010007 0x0000005c>,
<0x00010008 0x00000064>,
<0x00010009 0x0000006c>,
0x00020000 0x00000021
0x00020001 0x0000002c
0x00020002 0x00000036
0x00020003 0x00000040
0x00020004 0x0000004b
0x00020005 0x00000055
0x00020006 0x0000005f
<0x00020000 0x00000021>,
<0x00020001 0x0000002c>,
<0x00020002 0x00000036>,
<0x00020003 0x00000040>,
<0x00020004 0x0000004b>,
<0x00020005 0x00000055>,
<0x00020006 0x0000005f>,
0x00030000 0x00000013
0x00030001 0x0000001d
0x00030002 0x00000028
0x00030003 0x00000032
0x00030004 0x0000003d
0x00030005 0x00000047
0x00030006 0x00000052
0x00030007 0x0000005c>;
<0x00030000 0x00000013>,
<0x00030001 0x0000001d>,
<0x00030002 0x00000028>,
<0x00030003 0x00000032>,
<0x00030004 0x0000003d>,
<0x00030005 0x00000047>,
<0x00030006 0x00000052>,
<0x00030007 0x0000005c>;
#thermal-sensor-cells = <1>;
};

74
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
View File

@ -445,46 +445,46 @@
fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
fsl,tmu-calibration =
/* Calibration data group 1 */
<0x00000000 0x00000023
0x00000001 0x00000029
0x00000002 0x0000002f
0x00000003 0x00000036
0x00000004 0x0000003c
0x00000005 0x00000042
0x00000006 0x00000049
0x00000007 0x0000004f
0x00000008 0x00000055
0x00000009 0x0000005c
0x0000000a 0x00000062
0x0000000b 0x00000068
<0x00000000 0x00000023>,
<0x00000001 0x00000029>,
<0x00000002 0x0000002f>,
<0x00000003 0x00000036>,
<0x00000004 0x0000003c>,
<0x00000005 0x00000042>,
<0x00000006 0x00000049>,
<0x00000007 0x0000004f>,
<0x00000008 0x00000055>,
<0x00000009 0x0000005c>,
<0x0000000a 0x00000062>,
<0x0000000b 0x00000068>,
/* Calibration data group 2 */
0x00010000 0x00000022
0x00010001 0x0000002a
0x00010002 0x00000032
0x00010003 0x0000003a
0x00010004 0x00000042
0x00010005 0x0000004a
0x00010006 0x00000052
0x00010007 0x0000005a
0x00010008 0x00000062
0x00010009 0x0000006a
<0x00010000 0x00000022>,
<0x00010001 0x0000002a>,
<0x00010002 0x00000032>,
<0x00010003 0x0000003a>,
<0x00010004 0x00000042>,
<0x00010005 0x0000004a>,
<0x00010006 0x00000052>,
<0x00010007 0x0000005a>,
<0x00010008 0x00000062>,
<0x00010009 0x0000006a>,
/* Calibration data group 3 */
0x00020000 0x00000021
0x00020001 0x0000002b
0x00020002 0x00000035
0x00020003 0x0000003e
0x00020004 0x00000048
0x00020005 0x00000052
0x00020006 0x0000005c
<0x00020000 0x00000021>,
<0x00020001 0x0000002b>,
<0x00020002 0x00000035>,
<0x00020003 0x0000003e>,
<0x00020004 0x00000048>,
<0x00020005 0x00000052>,
<0x00020006 0x0000005c>,
/* Calibration data group 4 */
0x00030000 0x00000011
0x00030001 0x0000001a
0x00030002 0x00000024
0x00030003 0x0000002e
0x00030004 0x00000038
0x00030005 0x00000042
0x00030006 0x0000004c
0x00030007 0x00000056>;
<0x00030000 0x00000011>,
<0x00030001 0x0000001a>,
<0x00030002 0x00000024>,
<0x00030003 0x0000002e>,
<0x00030004 0x00000038>,
<0x00030005 0x00000042>,
<0x00030006 0x0000004c>,
<0x00030007 0x00000056>;
big-endian;
#thermal-sensor-cells = <1>;
};

74
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
View File

@ -284,46 +284,46 @@
fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
fsl,tmu-calibration =
/* Calibration data group 1 */
<0x00000000 0x00000023
0x00000001 0x0000002a
0x00000002 0x00000030
0x00000003 0x00000037
0x00000004 0x0000003d
0x00000005 0x00000044
0x00000006 0x0000004a
0x00000007 0x00000051
0x00000008 0x00000057
0x00000009 0x0000005e
0x0000000a 0x00000064
0x0000000b 0x0000006b
<0x00000000 0x00000023>,
<0x00000001 0x0000002a>,
<0x00000002 0x00000030>,
<0x00000003 0x00000037>,
<0x00000004 0x0000003d>,
<0x00000005 0x00000044>,
<0x00000006 0x0000004a>,
<0x00000007 0x00000051>,
<0x00000008 0x00000057>,
<0x00000009 0x0000005e>,
<0x0000000a 0x00000064>,
<0x0000000b 0x0000006b>,
/* Calibration data group 2 */
0x00010000 0x00000022
0x00010001 0x0000002a
0x00010002 0x00000032
0x00010003 0x0000003a
0x00010004 0x00000042
0x00010005 0x0000004a
0x00010006 0x00000052
0x00010007 0x0000005a
0x00010008 0x00000062
0x00010009 0x0000006a
<0x00010000 0x00000022>,
<0x00010001 0x0000002a>,
<0x00010002 0x00000032>,
<0x00010003 0x0000003a>,
<0x00010004 0x00000042>,
<0x00010005 0x0000004a>,
<0x00010006 0x00000052>,
<0x00010007 0x0000005a>,
<0x00010008 0x00000062>,
<0x00010009 0x0000006a>,
/* Calibration data group 3 */
0x00020000 0x00000021
0x00020001 0x0000002b
0x00020002 0x00000035
0x00020003 0x00000040
0x00020004 0x0000004a
0x00020005 0x00000054
0x00020006 0x0000005e
<0x00020000 0x00000021>,
<0x00020001 0x0000002b>,
<0x00020002 0x00000035>,
<0x00020003 0x00000040>,
<0x00020004 0x0000004a>,
<0x00020005 0x00000054>,
<0x00020006 0x0000005e>,
/* Calibration data group 4 */
0x00030000 0x00000010
0x00030001 0x0000001c
0x00030002 0x00000027
0x00030003 0x00000032
0x00030004 0x0000003e
0x00030005 0x00000049
0x00030006 0x00000054
0x00030007 0x00000060>;
<0x00030000 0x00000010>,
<0x00030001 0x0000001c>,
<0x00030002 0x00000027>,
<0x00030003 0x00000032>,
<0x00030004 0x0000003e>,
<0x00030005 0x00000049>,
<0x00030006 0x00000054>,
<0x00030007 0x00000060>;
little-endian;
#thermal-sensor-cells = <1>;
};

67
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
View File

@ -321,42 +321,43 @@
reg = <0x0 0x1f80000 0x0 0x10000>;
interrupts = <0 23 0x4>;
fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
fsl,tmu-calibration = <0x00000000 0x00000026
0x00000001 0x0000002d
0x00000002 0x00000032
0x00000003 0x00000039
0x00000004 0x0000003f
0x00000005 0x00000046
0x00000006 0x0000004d
0x00000007 0x00000054
0x00000008 0x0000005a
0x00000009 0x00000061
0x0000000a 0x0000006a
0x0000000b 0x00000071
fsl,tmu-calibration =
<0x00000000 0x00000026>,
<0x00000001 0x0000002d>,
<0x00000002 0x00000032>,
<0x00000003 0x00000039>,
<0x00000004 0x0000003f>,
<0x00000005 0x00000046>,
<0x00000006 0x0000004d>,
<0x00000007 0x00000054>,
<0x00000008 0x0000005a>,
<0x00000009 0x00000061>,
<0x0000000a 0x0000006a>,
<0x0000000b 0x00000071>,
0x00010000 0x00000025
0x00010001 0x0000002c
0x00010002 0x00000035
0x00010003 0x0000003d
0x00010004 0x00000045
0x00010005 0x0000004e
0x00010006 0x00000057
0x00010007 0x00000061
0x00010008 0x0000006b
0x00010009 0x00000076
<0x00010000 0x00000025>,
<0x00010001 0x0000002c>,
<0x00010002 0x00000035>,
<0x00010003 0x0000003d>,
<0x00010004 0x00000045>,
<0x00010005 0x0000004e>,
<0x00010006 0x00000057>,
<0x00010007 0x00000061>,
<0x00010008 0x0000006b>,
<0x00010009 0x00000076>,
0x00020000 0x00000029
0x00020001 0x00000033
0x00020002 0x0000003d
0x00020003 0x00000049
0x00020004 0x00000056
0x00020005 0x00000061
0x00020006 0x0000006d
<0x00020000 0x00000029>,
<0x00020001 0x00000033>,
<0x00020002 0x0000003d>,
<0x00020003 0x00000049>,
<0x00020004 0x00000056>,
<0x00020005 0x00000061>,
<0x00020006 0x0000006d>,
0x00030000 0x00000021
0x00030001 0x0000002a
0x00030002 0x0000003c
0x00030003 0x0000004e>;
<0x00030000 0x00000021>,
<0x00030001 0x0000002a>,
<0x00030002 0x0000003c>,
<0x00030003 0x0000004e>;
little-endian;
#thermal-sensor-cells = <1>;
};

338
arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts Normal file
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@ -0,0 +1,338 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Gregor Herburger
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "fsl-lx2160a-tqmlx2160a.dtsi"
/ {
model = "TQ Systems GmbH MBLX2160A Starterkit";
compatible = "tq,lx2160a-tqmlx2160a-mblx2160a", "tq,lx2160a-tqmlx2160a",
"fsl,lx2160a";
aliases {
mmc0 = &esdhc0;
mmc1 = &esdhc1;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
chosen {
stdout-path = &uart0;
};
gpio-keys {
compatible = "gpio-keys";
button-user1 {
label = "button:user1";
gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
linux,code = <KEY_F1>;
};
button-user2 {
label = "button:user2";
gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_F2>;
};
};
leds {
compatible = "gpio-leds";
led-user1 {
gpios = <&gpioex1 15 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_HEARTBEAT;
function-enumerator = <0>;
linux,default-trigger = "heartbeat";
};
led-user2 {
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_HEARTBEAT;
function-enumerator = <1>;
linux,default-trigger = "heartbeat";
};
};
sfp_xfi1: sfp-xfi1 {
compatible = "sff,sfp";
i2c-bus = <&xfi1_i2c>;
mod-def0-gpios = <&gpioex2 2 GPIO_ACTIVE_LOW>;
los-gpios = <&gpioex2 3 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&gpioex2 0 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&gpioex2 1 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
sfp_xfi2: sfp-xfi2 {
compatible = "sff,sfp";
i2c-bus = <&xfi2_i2c>;
mod-def0-gpios = <&gpioex2 6 GPIO_ACTIVE_LOW>;
los-gpios = <&gpioex2 7 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&gpioex2 4 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&gpioex2 5 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
};
&can0 {
status = "okay";
};
&can1 {
status = "okay";
};
&dpmac17 {
phy-handle = <&dp83867_2_3>;
phy-connection-type = "rgmii-id";
};
&dpmac18 {
phy-handle = <&dp83867_2_4>;
phy-connection-type = "rgmii-id";
};
&emdio1 {
status = "okay";
dp83867_1_1: ethernet-phy@1 {
reg = <1>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
dp83867_1_2: ethernet-phy@2 {
reg = <2>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
dp83867_1_3: ethernet-phy@3 {
reg = <3>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
dp83867_1_4: ethernet-phy@4 {
reg = <4>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
dp83867_1_5: ethernet-phy@5 {
reg = <5>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
dp83867_1_6: ethernet-phy@6 {
reg = <6>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
&emdio2 {
status = "okay";
dp83867_2_1: ethernet-phy@1 {
reg = <1>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
dp83867_2_2: ethernet-phy@2 {
reg = <2>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
dp83867_2_3: ethernet-phy@3 {
reg = <3>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
dp83867_2_4: ethernet-phy@4 {
reg = <4>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
&esdhc0 {
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
no-mmc;
no-sdio;
wp-gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
cd-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2c0 {
gpioex3: gpio@20 {
compatible = "nxp,pca9555";
reg = <0x20>;
#gpio-cells = <2>;
gpio-controller;
vcc-supply = <&reg_vcc3v3>;
};
};
&i2c4 {
status = "okay";
mux@70 {
compatible = "nxp,pca9544";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
vdd-supply = <&reg_vcc3v3>;
i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
gpioex0: gpio@20 {
compatible = "nxp,pca9555";
reg = <0x20>;
#gpio-cells = <2>;
gpio-controller;
vcc-supply = <&reg_vcc3v3>;
};
gpioex1: gpio@21 {
compatible = "nxp,pca9555";
reg = <0x21>;
#gpio-cells = <2>;
gpio-controller;
vcc-supply = <&reg_vcc3v3>;
};
gpioex2: gpio@22 {
compatible = "nxp,pca9555";
reg = <0x22>;
#gpio-cells = <2>;
gpio-controller;
vcc-supply = <&reg_vcc3v3>;
};
};
i2c@3 {
reg = <3>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
&i2c5 {
status = "okay";
mux@70 {
compatible = "nxp,pca9544";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
vdd-supply = <&reg_vcc3v3>;
i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
xfi1_i2c: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
xfi2_i2c: i2c@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3 {
reg = <3>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
&pcs_mdio17 {
status = "okay";
};
&pcs_mdio18 {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_2_0: hub@1 {
compatible = "usb451,8142";
reg = <1>;
peer-hub = <&hub_3_0>;
reset-gpios = <&gpioex1 0 GPIO_ACTIVE_LOW>;
vcc-supply = <&reg_vcc3v3>;
};
hub_3_0: hub@2 {
compatible = "usb451,8140";
reg = <2>;
peer-hub = <&hub_2_0>;
reset-gpios = <&gpioex1 0 GPIO_ACTIVE_LOW>;
vcc-supply = <&reg_vcc3v3>;
};
};
&usb1 {
dr_mode = "otg";
status = "okay";
};

29
arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_12_x_x.dtso Normal file
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@ -0,0 +1,29 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Gregor Herburger
*/
/dts-v1/;
/plugin/;
&dpmac9 {
phy-handle = <&dp83867_2_1>;
phy-connection-type = "sgmii";
managed = "in-band-status";
};
&dpmac10 {
phy-handle = <&dp83867_2_2>;
phy-connection-type = "sgmii";
managed = "in-band-status";
};
&pcs_mdio9 {
status = "okay";
};
&pcs_mdio10 {
status = "okay";
};

17
arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_14_x_x.dtso Normal file
View File

@ -0,0 +1,17 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Gregor Herburger
*/
/dts-v1/;
/plugin/;
&dpmac1 {
managed = "in-band-status";
};
&pcs_mdio1 {
status = "okay";
};

49
arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x.dtso Normal file
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@ -0,0 +1,49 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Gregor Herburger
*/
/dts-v1/;
/plugin/;
&dpmac12 {
phy-handle = <&dp83867_1_1>;
phy-connection-type = "sgmii";
managed = "in-band-status";
};
&dpmac13 {
phy-handle = <&dp83867_1_5>;
phy-connection-type = "sgmii";
managed = "in-band-status";
};
&dpmac14 {
phy-handle = <&dp83867_1_6>;
phy-connection-type = "sgmii";
managed = "in-band-status";
};
&dpmac16 {
phy-handle = <&dp83867_1_4>;
phy-connection-type = "sgmii";
managed = "in-band-status";
};
&pcs_mdio12 {
status = "okay";
};
&pcs_mdio13 {
status = "okay";
};
&pcs_mdio14 {
status = "okay";
};
&pcs_mdio16 {
status = "okay";
};

55
arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.dtso Normal file
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@ -0,0 +1,55 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Gregor Herburger
*/
/dts-v1/;
/plugin/;
&dpmac12 {
phy-handle = <&dp83867_1_1>;
phy-connection-type = "sgmii";
managed = "in-band-status";
};
&dpmac13 {
sfp = <&sfp_xfi1>;
managed = "in-band-status";
};
&dpmac14 {
sfp = <&sfp_xfi2>;
managed = "in-band-status";
};
&dpmac16 {
phy-handle = <&dp83867_1_4>;
phy-connection-type = "sgmii";
managed = "in-band-status";
};
&pcs_mdio12 {
status = "okay";
};
&pcs_mdio13 {
status = "okay";
};
&pcs_mdio14 {
status = "okay";
};
&pcs_mdio16 {
status = "okay";
};
&sfp_xfi1 {
status = "okay";
};
&sfp_xfi2 {
status = "okay";
};

47
arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_8_x.dtso Normal file
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@ -0,0 +1,47 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Gregor Herburger
*/
/dts-v1/;
/plugin/;
&dpmac13 {
sfp = <&sfp_xfi1>;
managed = "in-band-status";
};
&dpmac14 {
sfp = <&sfp_xfi2>;
managed = "in-band-status";
};
&pcs_mdio13 {
status = "okay";
};
&pcs_mdio14 {
status = "okay";
};
&sata0 {
status = "okay";
};
&sata1 {
status = "okay";
};
&sata2 {
status = "okay";
};
&sfp_xfi1 {
status = "okay";
};
&sfp_xfi2 {
status = "okay";
};

97
arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi Normal file
View File

@ -0,0 +1,97 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Gregor Herburger
*/
#include "fsl-lx2160a.dtsi"
/ {
reg_vcc3v3: regulator-vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&emdio1 {
status = "okay";
};
&emdio2 {
status = "okay";
};
&esdhc1 {
bus-width = <8>;
no-sd;
no-sdio;
non-removable;
mmc-hs200-1_8v;
status = "okay";
};
&fspi {
status = "okay";
flash0: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <10000000>;
spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
};
};
flash1: flash@1 {
compatible = "jedec,spi-nor";
reg = <1>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <10000000>;
spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
};
};
&i2c0 {
scl-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
status = "okay";
sensor0: temperature-sensor@1f {
compatible = "nxp,se97", "jedec,jc-42.4-temp";
reg = <0x1f>;
};
eeprom1: eeprom@57 {
compatible = "atmel,24c02";
reg = <0x57>;
pagesize = <16>;
read-only;
vcc-supply = <&reg_vcc3v3>;
};
rtc: rtc@51 {
compatible = "nxp,pcf85063a";
reg = <0x51>;
quartz-load-femtofarads = <12500>;
};
eeprom2: eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
vcc-supply = <&reg_vcc3v3>;
};
};

4
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
View File

@ -732,9 +732,9 @@
fsl,tmu-range = <0x800000e6 0x8001017d>;
fsl,tmu-calibration =
/* Calibration data group 1 */
<0x00000000 0x00000035
<0x00000000 0x00000035>,
/* Calibration data group 2 */
0x00000001 0x00000154>;
<0x00000001 0x00000154>;
little-endian;
#thermal-sensor-cells = <1>;
};

2
arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi
View File

@ -68,6 +68,7 @@
gpio = <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-name = "can1_supply";
startup-delay-us = <1000>;
};
reg_can2_supply: regulator-can2-supply {
@ -77,6 +78,7 @@
gpio = <&lsio_gpio2 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-name = "can2_supply";
startup-delay-us = <1000>;
};
reg_usb_host_vbus: regulator-usb-host-vbus {

2
arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi
View File

@ -24,7 +24,6 @@ audio_subsys: bus@59000000 {
compatible = "fsl,imx8qm-edma";
reg = <0x591f0000 0x190000>;
#dma-cells = <3>;
shared-interrupt;
dma-channels = <24>;
dma-channel-mask = <0x5c0c00>;
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* 0 asrc 0 */
@ -127,7 +126,6 @@ audio_subsys: bus@59000000 {
compatible = "fsl,imx8qm-edma";
reg = <0x599f0000 0xc0000>;
#dma-cells = <3>;
shared-interrupt;
dma-channels = <11>;
dma-channel-mask = <0xc0>;
interrupts = <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, /* 0 asrc 1 */

16
arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
View File

@ -13,6 +13,13 @@
clock-frequency = <250000000>;
clock-output-names = "conn_enet0_root_clk";
};
clk_dummy: clock-dummy {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "clk_dummy";
};
};
&conn_subsys {
@ -22,7 +29,7 @@
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eth_wake_irq", "macirq";
interrupt-names = "macirq", "eth_wake_irq";
clocks = <&eqos_lpcg IMX_LPCG_CLK_4>,
<&eqos_lpcg IMX_LPCG_CLK_6>,
<&eqos_lpcg IMX_LPCG_CLK_0>,
@ -53,13 +60,6 @@
rx-burst-size-dword = <0x10>;
power-domains = <&pd IMX_SC_R_USB_1>;
status = "disabled";
clk_dummy: clock-dummy {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "clk_dummy";
};
};
usbmisc2: usbmisc@5b0e0200 {

2
arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
View File

@ -4,6 +4,6 @@
*/
&ddr_pmu0 {
compatible = "fsl,imx8-ddr-pmu";
compatible = "fsl,imx8dxl-ddr-pmu", "fsl,imx8-ddr-pmu";
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
};

2
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
View File

@ -3,6 +3,8 @@
* Copyright 2020 Compass Electronics Group, LLC
*/
#include "imx8mm-overdrive.dtsi"
/ {
aliases {
rtc0 = &rtc;

2
arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtsi
View File

@ -104,7 +104,7 @@
compatible = "nxp,pca8574";
reg = <0x3a>;
gpio-controller;
#gpio-cells = <1>;
#gpio-cells = <2>;
};
};

12
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
View File

@ -367,12 +367,6 @@
interrupts = <11 8>;
status = "okay";
port {
typec1_dr_sw: endpoint {
remote-endpoint = <&usb1_drd_sw>;
};
};
typec1_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
@ -384,6 +378,12 @@
PDO_VAR(5000, 20000, 3000)>;
op-sink-microwatt = <15000000>;
self-powered;
port {
typec1_dr_sw: endpoint {
remote-endpoint = <&usb1_drd_sw>;
};
};
};
};
};

2
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
View File

@ -220,7 +220,7 @@
#address-cells = <1>;
#size-cells = <0>;
i2c3@0 {
i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;

29
arch/arm64/boot/dts/freescale/imx8mm-overdrive.dtsi Normal file
View File

@ -0,0 +1,29 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
&gpu_2d {
assigned-clocks = <&clk IMX8MM_CLK_GPU2D_CORE>,
<&clk IMX8MM_GPU_PLL_OUT>;
assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
assigned-clock-rates = <0>, <1000000000>;
};
&gpu_3d {
assigned-clocks = <&clk IMX8MM_CLK_GPU3D_CORE>,
<&clk IMX8MM_GPU_PLL_OUT>;
assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
assigned-clock-rates = <0>, <1000000000>;
};
&vpu_blk_ctrl {
assigned-clocks = <&clk IMX8MM_CLK_VPU_G1>,
<&clk IMX8MM_CLK_VPU_G2>,
<&clk IMX8MM_CLK_VPU_H1>,
<&clk IMX8MM_VPU_PLL_OUT>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
<&clk IMX8MM_VPU_PLL_OUT>,
<&clk IMX8MM_SYS_PLL3_OUT>;
assigned-clock-rates = <750000000>,
<700000000>,
<750000000>,
<700000000>;
};

1
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts
View File

@ -11,6 +11,7 @@
/ {
model = "TQ-Systems GmbH i.MX8MM TQMa8MxML on MBa8Mx";
compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
chassis-type = "embedded";
aliases {
eeprom0 = &eeprom3;

39
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
View File

@ -84,8 +84,15 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
<&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
tpm@1 {
compatible = "tcg,tpm_tis-spi";
reg = <0x1>;
spi-max-frequency = <36000000>;
};
};
&gpio1 {
@ -152,23 +159,30 @@
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
pcie@1,0 {
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
pcie@2,3 {
pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
eth1: pcie@5,0 {
eth1: ethernet@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
local-mac-address = [00 00 00 00 00 00];
};
@ -312,6 +326,7 @@
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6
>;
};

29
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
View File

@ -179,23 +179,30 @@
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
pcie@1,0 {
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
pcie@2,4 {
pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
eth1: pcie@6,0 {
eth1: ethernet@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
local-mac-address = [00 00 00 00 00 00];
};

13
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
View File

@ -635,13 +635,16 @@
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
eth1: pcie@1,0 {
eth1: ethernet@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
local-mac-address = [00 00 00 00 00 00];
};

173
arch/arm64/boot/dts/freescale/imx8mm-verdin-mallow.dtsi Normal file
View File

@ -0,0 +1,173 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2023 Toradex
*
* Common dtsi for Verdin IMX8MM SoM on Mallow carrier board
*
* https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-mini-nano
* https://www.toradex.com/products/carrier-board/mallow-carrier-board
*/
#include <dt-bindings/leds/common.h>
/ {
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
/* SODIMM 52 - USER_LED_1_RED */
led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_DEBUG;
function-enumerator = <1>;
gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
};
/* SODIMM 54 - USER_LED_1_GREEN */
led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DEBUG;
function-enumerator = <1>;
gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
};
/* SODIMM 56 - USER_LED_2_RED */
led-2 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_DEBUG;
function-enumerator = <2>;
gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>;
};
/* SODIMM 58 - USER_LED_2_GREEN */
led-3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DEBUG;
function-enumerator = <2>;
gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
};
};
};
/* Verdin SPI_1 */
&ecspi2 {
pinctrl-0 = <&pinctrl_ecspi2>, <&pinctrl_tpm_cs>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, <&gpio3 2 GPIO_ACTIVE_LOW>;
status = "okay";
tpm@1 {
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
reg = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpm_irq>;
interrupt-parent = <&gpio3>;
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
spi-max-frequency = <18500000>;
};
};
/* EEPROM on Mallow */
&eeprom_carrier_board {
status = "okay";
};
/* Verdin ETH_1 */
&fec1 {
status = "okay";
};
/* Temperature sensor on Mallow */
&hwmon_temp {
compatible = "ti,tmp1075";
status = "okay";
};
/* Verdin I2C_2_DSI */
&i2c2 {
status = "okay";
};
/* Verdin I2C_4_CSI */
&i2c3 {
status = "okay";
};
/* Verdin I2C_1 */
&i2c4 {
status = "okay";
};
/* Verdin PCIE_1 */
&pcie0 {
status = "okay";
};
&pcie_phy {
status = "okay";
};
/* Verdin PWM_3_DSI */
&pwm1 {
status = "okay";
};
/* Verdin PWM_1 */
&pwm2 {
status = "okay";
};
/* Verdin PWM_2 */
&pwm3 {
status = "okay";
};
/* Verdin UART_3 */
&uart1 {
status = "okay";
};
/* Verdin UART_1 */
&uart2 {
status = "okay";
};
/* Verdin UART_2 */
&uart3 {
status = "okay";
};
/* Verdin USB_1 */
&usbotg1 {
status = "okay";
};
/* Verdin USB_2 */
&usbotg2 {
status = "okay";
};
/* Verdin SD_1 */
&usdhc2 {
status = "okay";
};
&iomuxc {
pinctrl_leds: ledsgrp {
fsl,pins =
<MX8MM_IOMUXC_NAND_ALE_GPIO3_IO0 0x106>, /* SODIMM 52 */
<MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x106>, /* SODIMM 54 */
<MX8MM_IOMUXC_NAND_DATA00_GPIO3_IO6 0x106>, /* SODIMM 56 */
<MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x106>; /* SODIMM 58 */
};
pinctrl_tpm_cs: tpmcsgrp {
fsl,pins =
<MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x146>; /* SODIMM 64 */
};
pinctrl_tpm_irq: tpmirqgrp {
fsl,pins =
<MX8MM_IOMUXC_NAND_DQS_GPIO3_IO14 0x141>; /* SODIMM 66 */
};
};

18
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-mallow.dts Normal file
View File

@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2023 Toradex
*/
/dts-v1/;
#include "imx8mm-verdin.dtsi"
#include "imx8mm-verdin-nonwifi.dtsi"
#include "imx8mm-verdin-mallow.dtsi"
/ {
model = "Toradex Verdin iMX8M Mini on Mallow";
compatible = "toradex,verdin-imx8mm-nonwifi-mallow",
"toradex,verdin-imx8mm-nonwifi",
"toradex,verdin-imx8mm",
"fsl,imx8mm";
};

18
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-mallow.dts Normal file
View File

@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2023 Toradex
*/
/dts-v1/;
#include "imx8mm-verdin.dtsi"
#include "imx8mm-verdin-wifi.dtsi"
#include "imx8mm-verdin-mallow.dtsi"
/ {
model = "Toradex Verdin iMX8M Mini WB on Mallow";
compatible = "toradex,verdin-imx8mm-wifi-mallow",
"toradex,verdin-imx8mm-wifi",
"toradex,verdin-imx8mm",
"fsl,imx8mm";
};

18
arch/arm64/boot/dts/freescale/imx8mm.dtsi
View File

@ -636,6 +636,8 @@
clk: clock-controller@30380000 {
compatible = "fsl,imx8mm-ccm";
reg = <0x30380000 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
<&clk_ext3>, <&clk_ext4>;
@ -647,7 +649,6 @@
<&clk IMX8MM_CLK_AUDIO_AHB>,
<&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
<&clk IMX8MM_SYS_PLL3>,
<&clk IMX8MM_VIDEO_PLL1>,
<&clk IMX8MM_AUDIO_PLL1>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>,
<&clk IMX8MM_ARM_PLL_OUT>,
@ -657,7 +658,6 @@
<400000000>,
<400000000>,
<750000000>,
<594000000>,
<393216000>;
};
@ -1133,7 +1133,7 @@
assigned-clock-parents = <&clk IMX8MM_VIDEO_PLL1_OUT>,
<&clk IMX8MM_SYS_PLL2_1000M>,
<&clk IMX8MM_SYS_PLL1_800M>;
assigned-clock-rates = <594000000>, <500000000>, <200000000>;
assigned-clock-rates = <24000000>, <500000000>, <200000000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_LCDIF>;
status = "disabled";
@ -1151,12 +1151,8 @@
clocks = <&clk IMX8MM_CLK_DSI_CORE>,
<&clk IMX8MM_CLK_DSI_PHY_REF>;
clock-names = "bus_clk", "sclk_mipi";
assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE>,
<&clk IMX8MM_CLK_DSI_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
<&clk IMX8MM_CLK_24M>;
assigned-clock-rates = <266000000>, <24000000>;
samsung,pll-clock-frequency = <24000000>;
assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_MIPI_DSI>;
status = "disabled";
@ -1408,7 +1404,7 @@
assigned-clocks = <&clk IMX8MM_CLK_GPU3D_CORE>,
<&clk IMX8MM_GPU_PLL_OUT>;
assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
assigned-clock-rates = <0>, <1000000000>;
assigned-clock-rates = <0>, <800000000>;
power-domains = <&pgc_gpu>;
};
@ -1423,7 +1419,7 @@
assigned-clocks = <&clk IMX8MM_CLK_GPU2D_CORE>,
<&clk IMX8MM_GPU_PLL_OUT>;
assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
assigned-clock-rates = <0>, <1000000000>;
assigned-clock-rates = <0>, <800000000>;
power-domains = <&pgc_gpu>;
};

2
arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
View File

@ -3,6 +3,8 @@
* Copyright 2020 Compass Electronics Group, LLC
*/
#include "imx8mn-overdrive.dtsi"
/ {
aliases {
rtc0 = &rtc;

1
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
View File

@ -7,6 +7,7 @@
/dts-v1/;
#include "imx8mn.dtsi"
#include "imx8mn-bsh-smm-s2-display.dtsi"
/ {
chosen {

121
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi Normal file
View File

@ -0,0 +1,121 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2021 BSH
*/
/ {
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 700000 0>; /* 700000 ns = 1337Hz */
brightness-levels = <0 100>;
num-interpolated-steps = <100>;
default-brightness-level = <50>;
status = "okay";
};
reg_3v3_dvdd: regulator-3v3-O3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dvdd>;
regulator-name = "3v3-dvdd-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
};
reg_v3v3_avdd: regulator-3v3-O2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_avdd>;
regulator-name = "3v3-avdd-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 5 GPIO_ACTIVE_LOW>;
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_bl>;
status = "okay";
};
&lcdif {
assigned-clocks = <&clk IMX8MN_VIDEO_PLL1>;
assigned-clock-rates = <594000000>;
status = "okay";
};
&pgc_dispmix {
assigned-clocks = <&clk IMX8MN_CLK_DISP_AXI>, <&clk IMX8MN_CLK_DISP_APB>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_1000M>, <&clk IMX8MN_SYS_PLL1_800M>;
assigned-clock-rates = <500000000>, <200000000>;
};
&mipi_dsi {
#address-cells = <1>;
#size-cells = <0>;
samsung,esc-clock-frequency = <20000000>;
samsung,pll-clock-frequency = <12000000>;
status = "okay";
panel@0 {
compatible = "sharp,ls068b3sx02", "syna,r63353";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_panel>;
reg = <0>;
backlight = <&backlight>;
dvdd-supply = <&reg_3v3_dvdd>;
avdd-supply = <&reg_v3v3_avdd>;
reset-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
port {
panel_in: endpoint {
remote-endpoint = <&mipi_dsi_out>;
};
};
};
ports {
port@1 {
reg = <1>;
mipi_dsi_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&gpu {
status = "okay";
};
&iomuxc {
pinctrl_avdd: avddgrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x16 /* VDD 3V3_VO2 */
>;
};
/* This is for both PWM and voltage regulators for display */
pinctrl_bl: blgrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO01_PWM1_OUT 0x16
>;
};
pinctrl_dvdd: dvddgrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x16 /* VDD 3V3_VO3 */
>;
};
pinctrl_panel: panelgrp {
fsl,pins = <
MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x16 /* panel reset */
>;
};
};

160
arch/arm64/boot/dts/freescale/imx8mn-dimonoff-gateway-evk.dts Normal file
View File

@ -0,0 +1,160 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2022 DimOnOff
*/
/dts-v1/;
#include <dt-bindings/usb/pd.h>
#include "imx8mn-var-som-symphony.dts"
/ {
model = "DimOnOff Gateway EVK board";
compatible = "dimonoff,gateway-evk", "variscite,var-som-mx8mn",
"fsl,imx8mn";
/*
* U30 FPF2193 regulator.
* Source = BASE_PER_3V3 = SOM_3V3 (COM pin 49).
*/
reg_disp_3v3: regulator-disp-3v3 {
compatible = "regulator-fixed";
regulator-name = "Display 3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
key-enter {
label = "enter";
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
linux,code = <KEY_ENTER>;
wakeup-source;
};
};
/* Bourns PEC12R rotary encoder, 24 steps. */
rotary: rotary-encoder {
compatible = "rotary-encoder";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rotary>;
gpios = <&gpio5 12 GPIO_ACTIVE_LOW>, /* A */
<&gpio5 13 GPIO_ACTIVE_LOW>; /* B */
linux,axis = <0>; /* REL_X */
rotary-encoder,encoding = "gray";
rotary-encoder,relative-axis;
};
};
/* Disable Asynchronous Sample Rate Converter (audio) */
&easrc {
status = "disabled";
};
&ecspi1 {
/* Resistive touch controller */
/delete-node/ touchscreen@0;
};
&gpu {
status = "disabled";
};
&i2c2 {
adc@48 {
compatible = "ti,ads7924";
reg = <0x48>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc>;
vref-supply = <&reg_disp_3v3>;
reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
label = "Pot0";
};
channel@1 {
reg = <1>;
label = "Pot1";
};
channel@2 {
reg = <2>;
label = "Pot2";
};
channel@3 {
reg = <3>;
label = "Pot3";
};
};
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
reset-source; /* For watchdog. */
};
rtc@53 {
compatible = "nxp,pcf2131";
reg = <0x53>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc>;
reset-source; /* For watchdog. */
interrupt-parent = <&gpio5>;
interrupts = <10 IRQ_TYPE_EDGE_FALLING>; /* J17.6 on EVK */
};
};
&i2c3 {
touchscreen@38 {
status = "disabled";
};
codec@1a {
status = "disabled";
};
/* DS1337 RTC module */
rtc@68 {
status = "disabled";
};
};
&sai5 {
status = "disabled";
};
&iomuxc {
pinctrl_gpio_keys: gpiokeysgrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0xc6
>;
};
pinctrl_rotary: rotarygrp {
fsl,pins = <
MX8MN_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x00000156
MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x00000156
>;
};
pinctrl_adc: adcgrp {
fsl,pins = <
MX8MN_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x00000156
>;
};
pinctrl_rtc: rtcgrp {
fsl,pins = <
MX8MN_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x00000156
MX8MN_IOMUXC_ECSPI2_MOSI_GPIO5_IO11 0x00000156
>;
};
};

12
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
View File

@ -221,12 +221,6 @@
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
status = "okay";
port {
typec1_dr_sw: endpoint {
remote-endpoint = <&usb1_drd_sw>;
};
};
typec1_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
@ -238,6 +232,12 @@
PDO_VAR(5000, 20000, 3000)>;
op-sink-microwatt = <15000000>;
self-powered;
port {
typec1_dr_sw: endpoint {
remote-endpoint = <&usb1_drd_sw>;
};
};
};
};
};

18
arch/arm64/boot/dts/freescale/imx8mn-overdrive.dtsi Normal file
View File

@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
&gpu {
assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE>,
<&clk IMX8MN_CLK_GPU_SHADER>,
<&clk IMX8MN_CLK_GPU_AXI>,
<&clk IMX8MN_CLK_GPU_AHB>,
<&clk IMX8MN_GPU_PLL>;
assigned-clock-parents = <&clk IMX8MN_GPU_PLL_OUT>,
<&clk IMX8MN_GPU_PLL_OUT>,
<&clk IMX8MN_SYS_PLL1_800M>,
<&clk IMX8MN_SYS_PLL1_800M>;
assigned-clock-rates = <600000000>,
<600000000>,
<800000000>,
<400000000>,
<1200000000>;
};

285
arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts Normal file
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@ -0,0 +1,285 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2023 DimOnOff
*/
/dts-v1/;
#include <dt-bindings/usb/pd.h>
#include "imx8mn-var-som.dtsi"
/ {
model = "RVE gateway";
compatible = "rve,rve-gateway", "variscite,var-som-mx8mn", "fsl,imx8mn";
crystal_duart_24m: crystal-duart-24m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
key-enter {
label = "enter";
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_ENTER>;
};
key-exit {
label = "exit";
gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_ESC>;
};
};
lcd {
compatible = "hit,hd44780";
display-height-chars = <2>;
display-width-chars = <20>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>;
data-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>,
<&gpio1 6 GPIO_ACTIVE_HIGH>,
<&gpio1 14 GPIO_ACTIVE_HIGH>,
<&gpio4 28 GPIO_ACTIVE_HIGH>,
<&gpio5 24 GPIO_ACTIVE_HIGH>,
<&gpio5 2 GPIO_ACTIVE_HIGH>,
<&gpio1 12 GPIO_ACTIVE_HIGH>,
<&gpio5 25 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
rs-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
rw-gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
/* Bourns PEC12R rotary encoder, 24 steps. */
rotary: rotary-encoder {
compatible = "rotary-encoder";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rotary>;
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>, /* A */
<&gpio3 21 GPIO_ACTIVE_LOW>; /* B */
linux,axis = <0>; /* REL_X */
rotary-encoder,encoding = "gray";
rotary-encoder,relative-axis;
};
};
&ecspi1 {
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
duart1: serial@0 {
compatible = "nxp,sc16is752";
reg = <0>;
spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
spi-max-frequency = <4000000>;
clocks = <&crystal_duart_24m>;
interrupt-parent = <&gpio3>;
interrupts = <22 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "RADIO0", "RADIO1", "RADIO2", "RADIO3",
"RADIO4", "RADIO_RESET", "TP12", "TP11";
linux,rs485-enabled-at-boot-time;
rs485-rts-active-low;
};
/delete-node/ touchscreen@0;
};
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
duart2: serial@0 {
compatible = "nxp,sc16is752";
reg = <0>;
spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
spi-max-frequency = <4000000>;
clocks = <&crystal_duart_24m>;
interrupt-parent = <&gpio3>;
interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "LED_B_USER", "LED_R_USER", "LED_G_USER",
"GPIO_EXT3", "GPIO_EXT2", "GPIO_EXT1",
"GPIO_EXT0", "TP13";
linux,rs485-enabled-at-boot-time;
rs485-rts-active-low;
};
};
/* Configure PWM pins in GPIO mode: */
&gpio5 {
gpio-line-names = "", "", "", "PWM3", "PWM2", "PWM1";
};
&gpu {
status = "disabled";
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
/* Carrier board EEPROM */
eeprom_cb: eeprom@56 {
compatible = "atmel,24c04";
reg = <0x56>;
pagesize = <16>;
vcc-supply = <&reg_3p3v>;
};
lm75: sensor@48 {
compatible = "st,stlm75";
reg = <0x48>;
vs-supply = <&reg_3p3v>;
};
mcp7940: rtc@6f {
compatible = "microchip,mcp7940x";
reg = <0x6f>;
};
};
&i2c3 {
codec@1a {
status = "disabled";
};
};
&i2c4 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>;
status = "okay";
pcf8574_1: gpio@38 {
compatible = "nxp,pcf8574";
reg = <0x38>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "LED_B_COMM3", "LED_R_COMM3", "LED_G_COMM3",
"TP14", "TP15", "LED_G_COMM4", "LED_R_COMM4",
"LED_B_COMM4";
};
pcf8574_2: gpio@39 {
compatible = "nxp,pcf8574";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "LED_B_COMM2", "LED_G_COMM2", "LED_B_COMM1",
"LED_R_COMM2", "LED_R_COMM1", "LED_G_COMM1",
"TP16", "TP17";
};
};
/* Bluetooth */
&uart2 {
status = "disabled";
};
&usbotg1 {
dr_mode = "host";
disable-over-current;
status = "okay";
};
/* SD interface on expansion connector. */
&usdhc2 {
vmmc-supply = <&reg_3p3v>;
cd-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
};
&iomuxc {
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x13
MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x13
MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x13
MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x13 /* SS0 */
MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x13 /* SC16 IRQ */
>;
};
pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x13
MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x13
MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x13
MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x13 /* SS0 */
MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x13 /* SC16 IRQ */
>;
};
pinctrl_gpio_keys: gpiokeysgrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0xc6 /* Enter */
MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0xc6 /* Exit */
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
>;
};
pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
>;
};
pinctrl_lcd: lcdgrp {
fsl,pins = <
MX8MN_IOMUXC_SAI3_TXD_GPIO5_IO1 0x00000156 /* D0 */
MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x00000156 /* D1 */
MX8MN_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x00000156 /* D2 */
MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00000156 /* D3 */
MX8MN_IOMUXC_UART2_RXD_GPIO5_IO24 0x00000156 /* D4 */
MX8MN_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x00000156 /* D5 */
MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x00000156 /* D6 */
MX8MN_IOMUXC_UART2_TXD_GPIO5_IO25 0x00000156 /* D7 */
MX8MN_IOMUXC_UART1_TXD_GPIO5_IO23 0x00000156 /* E */
MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x00000156 /* RS */
MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x00000156 /* R/W */
>;
};
pinctrl_rotary: rotarygrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x00000156 /* A */
MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x00000156 /* B */
>;
};
/* Override Card Detect function GPIO value (GPIO1_IO10) from SOM: */
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x41
>;
};
};

1
arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts
View File

@ -11,6 +11,7 @@
/ {
model = "TQ-Systems GmbH i.MX8MN TQMa8MxNL on MBa8Mx";
compatible = "tq,imx8mn-tqma8mqnl-mba8mx", "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
chassis-type = "embedded";
aliases {
eeprom0 = &eeprom3;

21
arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts
View File

@ -57,6 +57,15 @@
linux,default-trigger = "heartbeat";
};
};
/* Peripherals supply, enabled by Q2 after SOM_3V3 rises. */
reg_per_3v3: regulator-peripheral-3v3 {
compatible = "regulator-fixed";
regulator-name = "per_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&ethphy {
@ -79,6 +88,7 @@
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
#gpio-cells = <2>;
wakeup-source;
vcc-supply = <&reg_per_3v3>;
/* USB 3.0 OTG (usbotg1) / SATA port switch, set to USB 3.0 */
usb3-sata-sel-hog {
@ -118,9 +128,14 @@
pinctrl-0 = <&pinctrl_ptn5150>;
status = "okay";
port {
typec1_dr_sw: endpoint {
remote-endpoint = <&usb1_drd_sw>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
port {
typec1_dr_sw: endpoint {
remote-endpoint = <&usb1_drd_sw>;
};
};
};
};

9
arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
View File

@ -31,6 +31,14 @@
gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_3v3_fixed: regulator-3v3-fixed {
compatible = "regulator-fixed";
regulator-name = "fixed_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&A53_0 {
@ -234,6 +242,7 @@
compatible = "atmel,24c04";
reg = <0x52>;
pagesize = <16>;
vcc-supply = <&reg_3v3_fixed>;
};
};

2
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View File

@ -637,6 +637,8 @@
clk: clock-controller@30380000 {
compatible = "fsl,imx8mn-ccm";
reg = <0x30380000 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
<&clk_ext3>, <&clk_ext4>;

92
arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
View File

@ -94,6 +94,17 @@
};
};
bridge-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7535_out>;
};
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -153,6 +164,21 @@
enable-active-high;
};
sound-adv7535 {
compatible = "simple-audio-card";
simple-audio-card,name = "sound-adv7535";
simple-audio-card,format = "i2s";
simple-audio-card,cpu {
sound-dai = <&sai5>;
system-clock-direction-out;
};
simple-audio-card,codec {
sound-dai = <&adv_bridge>;
};
};
sound-dmic {
compatible = "simple-audio-card";
simple-audio-card,name = "sound-pdm";
@ -274,6 +300,35 @@
#interrupt-cells = <2>;
};
adv_bridge: hdmi@3d {
compatible = "adi,adv7535";
reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
reg-names = "main", "cec", "edid", "packet";
adi,dsi-lanes = <4>;
#sound-dai-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7535_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
port@1 {
reg = <1>;
adv7535_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
pcieclk: clock-generator@68 {
compatible = "renesas,9fgv0241";
reg = <0x68>;
@ -398,6 +453,10 @@
};
};
&lcdif1 {
status = "okay";
};
&micfil {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pdm>;
@ -407,6 +466,21 @@
status = "okay";
};
&mipi_dsi {
samsung,esc-clock-frequency = <10000000>;
status = "okay";
ports {
port@1 {
reg = <1>;
dsi_out: endpoint {
remote-endpoint = <&adv7535_in>;
};
};
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
@ -433,6 +507,16 @@
status = "okay";
};
&sai5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai5>;
assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
assigned-clock-rates = <12288000>;
fsl,sai-mclk-direction-output;
status = "okay";
};
&snvs_pwrkey {
status = "okay";
};
@ -612,6 +696,14 @@
>;
};
pinctrl_sai5: sai5grp {
fsl,pins = <
MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6
MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
>;
};
pinctrl_tpm: tpmgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */

2
arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
View File

@ -75,7 +75,7 @@
&eqos {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eqos>;
phy-connection-type = "rgmii-id";
phy-mode = "rgmii-id";
phy-handle = <&ethphy0>;
status = "okay";

56
arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts
View File

@ -63,6 +63,50 @@
regulator-always-on;
};
reg_csi1_1v8: regulator-csi1-vdd1v8 {
compatible = "regulator-fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "CSI1_VDD1V8";
gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_baseboard_vdd3v3>;
};
reg_csi1_3v3: regulator-csi1-vdd3v3 {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "CSI1_VDD3V3";
gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_vdd5v0>;
};
reg_csi2_1v8: regulator-csi2-vdd1v8 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_csi2_1v8>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "CSI2_VDD1V8";
gpio = <&gpio3 21 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_baseboard_vdd3v3>;
};
reg_csi2_3v3: regulator-csi2-vdd3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_csi2_3v3>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "CSI2_VDD3V3";
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_vdd5v0>;
};
regulator-vbus-usb20 {
compatible = "regulator-fixed";
regulator-min-microvolt = <5000000>;
@ -413,6 +457,18 @@
>;
};
pinctrl_reg_csi2_1v8: regcsi21v8grp {
fsl,pins = <
MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x19
>;
};
pinctrl_reg_csi2_3v3: regcsi23v3grp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x19
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x14f

22
arch/arm64/boot/dts/freescale/imx8mp-debix-som-a.dtsi
View File

@ -6,6 +6,8 @@
#include "imx8mp.dtsi"
#include <dt-bindings/leds/common.h>
/ {
model = "Polyhex i.MX8MPlus Debix SOM A";
compatible = "polyhex,imx8mp-debix-som-a", "fsl,imx8mp";
@ -20,6 +22,20 @@
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_led>;
led-0 {
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
};
};
};
&A53_0 {
@ -203,6 +219,12 @@
};
&iomuxc {
pinctrl_gpio_led: gpioledgrp {
fsl,pins = <
MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x19
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2

10
arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts
View File

@ -175,10 +175,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ptn5150>;
port {
connector {
compatible = "usb-c-connector";
label = "USB-C";
ptn5150_out_ep: endpoint {
remote-endpoint = <&dwc3_0_ep>;
port {
ptn5150_out_ep: endpoint {
remote-endpoint = <&dwc3_0_ep>;
};
};
};
};

12
arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
View File

@ -420,6 +420,18 @@
reg = <0x53>;
};
eeprom0wl: eeprom@58 {
compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */
pagesize = <32>;
reg = <0x58>;
};
eeprom1wl: eeprom@5b {
compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */
pagesize = <32>;
reg = <0x5b>;
};
ioexp: gpio@74 {
compatible = "nxp,pca9539";
reg = <0x74>;

4
arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts
View File

@ -57,8 +57,8 @@
clocks = <&clk IMX8MP_CLK_CLKOUT1>;
#sound-dai-cells = <0>;
VDDA-supply = <&reg_vcc_3v3_audio>;
VDDD-supply = <&reg_vcc_1v8_audio>;
VDDA-supply = <&reg_vcc_3v3_audio>;
VDDD-supply = <&reg_vcc_1v8_audio>;
VDDIO-supply = <&reg_vcc_1v8_audio>;
};
};

711
arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi Normal file
View File

@ -0,0 +1,711 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
#include "imx8mp.dtsi"
#include <dt-bindings/leds/common.h>
/ {
aliases {
/* some of this aliases like backlight0, ethernetX and switch0
* are needed for the bootloader.
*/
backlight0 = &backlight;
ethernet0 = &eqos;
ethernet1 = &lan1;
ethernet2 = &lan2;
rtc0 = &i2c_rtc;
rtc1 = &snvs_rtc;
switch0 = &switch;
};
/*
* Backlight is present only on some of boards, so it is disabled by
* default.
*/
backlight: backlight {
compatible = "pwm-backlight";
pinctrl-0 = <&pinctrl_backlight>;
pwms = <&pwm1 0 20000 0>;
power-supply = <&reg_24v>;
enable-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
brightness-levels = <0 255>;
num-interpolated-steps = <17>;
default-brightness-level = <8>;
status = "disabled";
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_led>;
led-0 {
label = "D1";
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_STATUS;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led-1 {
label = "D2";
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led-2 {
label = "D3";
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
reg_1v2: regulator-1v2 {
compatible = "regulator-fixed";
vin-supply = <&reg_5v_p>;
regulator-name = "1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
reg_2v5: regulator-2v5 {
compatible = "regulator-fixed";
vin-supply = <&reg_5v_s>;
regulator-name = "2V5";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
vin-supply = <&reg_5v_s>;
regulator-name = "3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
/*
* This regulator will provide power as long as possible even if
* undervoltage is detected.
*/
reg_5v_p: regulator-5v-p {
compatible = "regulator-fixed";
regulator-name = "5V_P";
vin-supply = <&reg_24v>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
/*
* This regulator will be automatically shutdown if undervoltage is
* detected.
*/
reg_5v_s: regulator-5v-s {
compatible = "regulator-fixed";
regulator-name = "5V_S";
vin-supply = <&reg_24v>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_24v: regulator-24v {
compatible = "regulator-fixed";
regulator-name = "24V";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
};
reg_can2rs: regulator-can2rs {
compatible = "regulator-fixed";
regulator-name = "CAN2RS";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can2rs>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
reg_canrs: regulator-canrs {
compatible = "regulator-fixed";
regulator-name = "CANRS";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_canrs>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
};
reg_tft_vcom: regulator-tft-vcom {
compatible = "pwm-regulator";
pwms = <&pwm4 0 20000 0>;
regulator-name = "VCOM";
vin-supply = <&reg_5v_s>;
regulator-min-microvolt = <3600000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
voltage-table = <3600000 26>;
status = "disabled";
};
reg_vsd_3v3: regulator-vsd-3v3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_vsd_3v3>;
vin-supply = <&reg_vdd_3v3>;
compatible = "regulator-fixed";
regulator-name = "VSD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&A53_0 {
cpu-supply = <&reg_vdd_arm>;
};
&A53_1 {
cpu-supply = <&reg_vdd_arm>;
};
&A53_2 {
cpu-supply = <&reg_vdd_arm>;
};
&A53_3 {
cpu-supply = <&reg_vdd_arm>;
};
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
status = "okay";
adc: adc@0 {
compatible = "microchip,mcp3002";
reg = <0>;
vref-supply = <&reg_vdd_3v3>;
spi-max-frequency = <1000000>;
#io-channel-cells = <1>;
};
};
&eqos {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eqos>;
phy-mode = "rgmii-txid";
status = "okay";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <&reg_canrs>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
xceiver-supply = <&reg_can2rs>;
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic@25 {
compatible = "nxp,pca9450c";
reg = <0x25>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupts-extended = <&gpio1 3 IRQ_TYPE_EDGE_RISING>;
sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
regulators {
reg_vdd_soc: BUCK1 {
regulator-name = "VDD_SOC";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <2187500>;
vin-supply = <&reg_5v_p>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <3125>;
};
reg_vdd_arm: BUCK2 {
regulator-name = "VDD_ARM";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <2187500>;
vin-supply = <&reg_5v_p>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <3125>;
nxp,dvs-run-voltage = <950000>;
nxp,dvs-standby-voltage = <850000>;
};
reg_vdd_3v3: BUCK4 {
regulator-name = "VDD_3V3";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3400000>;
vin-supply = <&reg_5v_p>;
regulator-boot-on;
regulator-always-on;
};
reg_vdd_1v8: BUCK5 {
regulator-name = "VDD_1V8";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3400000>;
vin-supply = <&reg_5v_p>;
regulator-boot-on;
regulator-always-on;
};
reg_nvcc_dram_1v1: BUCK6 {
regulator-name = "NVCC_DRAM_1V1";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3400000>;
vin-supply = <&reg_5v_p>;
regulator-boot-on;
regulator-always-on;
};
reg_nvcc_snvs_1v8: LDO1 {
regulator-name = "NVCC_SNVS_1V8";
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_5v_p>;
regulator-boot-on;
regulator-always-on;
};
reg_vdda_1v8: LDO3 {
regulator-name = "VDDA_1V8";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_5v_p>;
regulator-boot-on;
regulator-always-on;
};
reg_nvcc_sd2: LDO5 {
regulator-name = "NVCC_SD2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_5v_p>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
i2c_rtc: rtc@51 {
compatible = "nxp,pcf85063tp";
reg = <0x51>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc>;
interrupts-extended = <&gpio4 31 IRQ_TYPE_EDGE_FALLING>;
quartz-load-femtofarads = <12500>;
};
};
&i2c4 {
clock-frequency = <380000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>;
status = "okay";
switch: switch@5f {
compatible = "microchip,ksz9893";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_switch>;
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
reg = <0x5f>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
lan1: port@0 {
reg = <0>;
phy-mode = "internal";
label = "lan1";
};
lan2: port@1 {
reg = <1>;
phy-mode = "internal";
label = "lan2";
};
port@2 {
reg = <2>;
label = "cpu";
ethernet = <&eqos>;
phy-mode = "rgmii";
/* 2ns RX delay is implemented on PCB */
tx-internal-delay-ps = <2000>;
rx-internal-delay-ps = <0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
/* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&usb3_0 {
status = "okay";
};
&usb3_1 {
status = "okay";
};
&usb3_phy0 {
vbus-supply = <&reg_3v3>;
status = "okay";
};
&usb3_phy1 {
vbus-supply = <&reg_3v3>;
status = "okay";
};
&usb_dwc3_0 {
dr_mode = "host";
};
&usb_dwc3_1 {
dr_mode = "host";
};
/* SD Card */
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
vmmc-supply = <&reg_vsd_3v3>;
vqmmc-supply = <&reg_nvcc_sd2>;
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
bus-width = <4>;
status = "okay";
};
/* eMMC */
&usdhc3 {
assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
assigned-clock-rates = <400000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
vmmc-supply = <&reg_vdd_3v3>;
vqmmc-supply = <&reg_vdd_1v8>;
bus-width = <8>;
no-sd;
no-sdio;
non-removable;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
&iomuxc {
pinctrl_backlight: backlightgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x0100
>;
};
pinctrl_can2rs: can2rsgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x154
>;
};
pinctrl_canrs: canrsgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x154
>;
};
pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x44
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x44
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x44
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40
>;
};
pinctrl_eqos: eqosgrp {
fsl,pins = <
MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91
MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91
MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91
MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91
MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91
MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91
MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f
MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f
MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f
MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f
MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
>;
};
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_MCLK__CAN2_RX 0x154
MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX 0x154
>;
};
pinctrl_gpio_led: gpioledgrp {
fsl,pins = <
MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x19
MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x19
MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x19
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
>;
};
pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c3
MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c3
>;
};
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x41
MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04 0x41
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT 0x116
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x116
>;
};
pinctrl_reg_vsd_3v3: regvsd3v3grp {
fsl,pins = <
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
>;
};
pinctrl_rtc: rtcgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x41
>;
};
pinctrl_switch: switchgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x41
MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x41
>;
};
pinctrl_touchscreen: touchscreengrp {
fsl,pins = <
/* external 10 k pull up */
/* CTP_INT */
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
/* CTP_RST */
MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x41
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
MX8MP_IOMUXC_UART3_RXD__UART1_DTE_RTS 0x140
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x14f
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x14f
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
>;
};
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
>;
};
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
>;
};
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x1c4
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
>;
};
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
>;
};
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6
>;
};
};

20
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts Normal file
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@ -0,0 +1,20 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "imx8mp-skov-reva.dtsi"
/ {
model = "SKOV IMX8MP CPU revB - HDMI";
compatible = "skov,imx8mp-skov-revb-hdmi", "fsl,imx8mp";
};
&iomuxc {
pinctrl_hdmi: hdmigrp {
fsl,pins = <
MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3
MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3
MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19
>;
};
};

101
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts Normal file
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@ -0,0 +1,101 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "imx8mp-skov-reva.dtsi"
/ {
model = "SKOV IMX8MP CPU revB - LT6";
compatible = "skov,imx8mp-skov-revb-lt6", "fsl,imx8mp";
touchscreen {
compatible = "resistive-adc-touch";
io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>, <&adc_ts 5>;
io-channel-names = "y", "z1", "z2", "x";
touchscreen-min-pressure = <65000>;
touchscreen-inverted-y;
touchscreen-swapped-x-y;
touchscreen-x-plate-ohms = <300>;
};
};
&reg_tft_vcom {
regulator-min-microvolt = <3600000>;
regulator-max-microvolt = <3600000>;
voltage-table = <3600000 26>;
status = "okay";
};
&pwm4 {
status = "okay";
};
&backlight {
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
status = "okay";
adc_ts: adc@0 {
compatible = "ti,tsc2046e-adc";
reg = <0>;
pinctrl-0 = <&pinctrl_touch>;
pinctrl-names ="default";
spi-max-frequency = <1000000>;
interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
#io-channel-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
channel@1 {
reg = <1>;
settling-time-us = <700>;
oversampling-ratio = <5>;
};
channel@3 {
reg = <3>;
settling-time-us = <700>;
oversampling-ratio = <5>;
};
channel@4 {
reg = <4>;
settling-time-us = <700>;
oversampling-ratio = <5>;
};
channel@5 {
reg = <5>;
settling-time-us = <700>;
oversampling-ratio = <5>;
};
};
};
&pwm1 {
status = "okay";
};
&iomuxc {
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x44
MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x44
MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x44
MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x40
>;
};
pinctrl_touch: touchgrp {
fsl,pins = <
/* external pull up */
MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x40
>;
};
};

100
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts Normal file
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@ -0,0 +1,100 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "imx8mp-skov-reva.dtsi"
/ {
model = "SKOV IMX8MP CPU revB - MI1010AIT-1CP1";
compatible = "skov,imx8mp-skov-revb-mi1010ait-1cp1", "fsl,imx8mp";
panel {
compatible = "multi-inno,mi1010ait-1cp";
backlight = <&backlight>;
power-supply = <&reg_tft_vcom>;
port {
in_lvds0: endpoint {
remote-endpoint = <&ldb_lvds_ch0>;
};
};
};
};
&backlight {
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_touchscreen>;
interrupts-extended = <&gpio4 28 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
touchscreen-size-x = <1280>;
touchscreen-size-y = <800>;
vcc-supply = <&reg_vdd_3v3>;
iovcc-supply = <&reg_vdd_3v3>;
wakeup-source;
};
};
&lcdif2 {
status = "okay";
};
&lvds_bridge {
/* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */
assigned-clock-rates = <482300000>;
status = "okay";
ports {
port@1 {
ldb_lvds_ch0: endpoint {
remote-endpoint = <&in_lvds0>;
};
};
};
};
&media_blk_ctrl {
/* currently it is not possible to let display clocks confugure
* automatically, so we need to set them manually
*/
assigned-clock-rates = <500000000>, <200000000>, <0>,
/* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */
<68900000>,
/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */
<964600000>;
};
&pwm4 {
status = "okay";
};
&pwm1 {
status = "okay";
};
&reg_tft_vcom {
regulator-min-microvolt = <3160000>;
regulator-max-microvolt = <3160000>;
voltage-table = <3160000 73>;
status = "okay";
};
&iomuxc {
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
>;
};
};

77
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtso Normal file
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@ -0,0 +1,77 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (c) 2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/imx8mp-clock.h>
&{/} {
compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
};
&backlight_lvds {
status = "okay";
};
&display {
compatible = "auo,g133han01";
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-odd-pixels;
panel_in_lvds0: endpoint {
remote-endpoint = <&ldb_lvds_ch0>;
};
};
port@1 {
reg = <1>;
dual-lvds-even-pixels;
panel_in_lvds1: endpoint {
remote-endpoint = <&ldb_lvds_ch1>;
};
};
};
};
&lcdif2 {
status = "okay";
};
&lvds_bridge {
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>,
<&clk IMX8MP_VIDEO_PLL1>;
assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
assigned-clock-rates = <0>, <988400000>;
status = "okay";
ports {
port@1 {
ldb_lvds_ch0: endpoint {
remote-endpoint = <&panel_in_lvds0>;
};
};
port@2 {
ldb_lvds_ch1: endpoint {
remote-endpoint = <&panel_in_lvds1>;
};
};
};
};
&pwm2 {
status = "okay";
};

28
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
View File

@ -15,6 +15,7 @@
/ {
model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
chassis-type = "embedded";
chosen {
stdout-path = &uart4;
@ -55,6 +56,21 @@
clock-frequency = <25000000>;
};
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
type = "micro";
label = "X29";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon0>;
id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
port {
usb_dr_connector: endpoint {
remote-endpoint = <&usb3_dwc>;
};
};
};
fan0: pwm-fan {
compatible = "pwm-fan";
pinctrl-names = "default";
@ -602,7 +618,6 @@
&usb3_1 {
fsl,disable-port-power-control;
fsl,permanently-attached;
dr_mode = "host";
status = "okay";
};
@ -626,13 +641,10 @@
role-switch-default-mode = "peripheral";
status = "okay";
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
type = "micro";
label = "X29";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon0>;
id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
port {
usb3_dwc: endpoint {
remote-endpoint = <&usb_dr_connector>;
};
};
};

26
arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
View File

@ -8,6 +8,21 @@
#include <dt-bindings/phy/phy-imx8-pcie.h>
/ {
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon1>;
type = "micro";
label = "Type-C";
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
port {
usb_dr_connector: endpoint {
remote-endpoint = <&usb3_dwc>;
};
};
};
led-controller {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -132,13 +147,10 @@
role-switch-default-mode = "peripheral";
status = "okay";
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon1>;
type = "micro";
label = "Type-C";
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
port {
usb3_dwc: endpoint {
remote-endpoint = <&usb_dr_connector>;
};
};
};

36
arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
View File

@ -8,6 +8,21 @@
#include <dt-bindings/phy/phy-imx8-pcie.h>
/ {
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon1>;
type = "micro";
label = "otg";
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
port {
usb_dr_connector: endpoint {
remote-endpoint = <&usb3_dwc>;
};
};
};
led-controller {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -83,8 +98,15 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
<&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
tpm@1 {
compatible = "tcg,tpm_tis-spi";
reg = <0x1>;
spi-max-frequency = <36000000>;
};
};
&gpio4 {
@ -175,13 +197,10 @@
role-switch-default-mode = "peripheral";
status = "okay";
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon1>;
type = "micro";
label = "otg";
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
port {
usb3_dwc: endpoint {
remote-endpoint = <&usb_dr_connector>;
};
};
};
@ -285,6 +304,7 @@
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140
>;
};

26
arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
View File

@ -8,6 +8,21 @@
#include <dt-bindings/phy/phy-imx8-pcie.h>
/ {
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon1>;
type = "micro";
label = "otg";
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
port {
usb_dr_connector: endpoint {
remote-endpoint = <&usb3_dwc>;
};
};
};
led-controller {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -201,13 +216,10 @@
role-switch-default-mode = "peripheral";
status = "okay";
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon1>;
type = "micro";
label = "otg";
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
port {
usb3_dwc: endpoint {
remote-endpoint = <&usb_dr_connector>;
};
};
};

28
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
View File

@ -35,6 +35,21 @@
reg = <0x0 0x40000000 0 0x80000000>;
};
connector {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon1>;
compatible = "gpio-usb-b-connector", "usb-b-connector";
type = "micro";
label = "Type-C";
id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
port {
usb_dr_connector: endpoint {
remote-endpoint = <&usb3_dwc>;
};
};
};
gpio-keys {
compatible = "gpio-keys";
@ -182,8 +197,6 @@
tpm@0 {
compatible = "tcg,tpm_tis-spi";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x0>;
spi-max-frequency = <36000000>;
};
@ -694,13 +707,10 @@
role-switch-default-mode = "peripheral";
status = "okay";
connector {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbcon1>;
compatible = "gpio-usb-b-connector", "usb-b-connector";
type = "micro";
label = "Type-C";
id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
port {
usb3_dwc: endpoint {
remote-endpoint = <&usb_dr_connector>;
};
};
};

199
arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi Normal file
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@ -0,0 +1,199 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2023 Toradex
*
* Common dtsi for Verdin IMX8MP SoM on Mallow carrier board
*
* https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plus
* https://www.toradex.com/products/carrier-board/mallow-carrier-board
*/
#include <dt-bindings/leds/common.h>
/ {
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
/* SODIMM 52 - USER_LED_1_RED */
led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_DEBUG;
function-enumerator = <1>;
gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
};
/* SODIMM 54 - USER_LED_1_GREEN */
led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DEBUG;
function-enumerator = <1>;
gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
};
/* SODIMM 56 - USER_LED_2_RED */
led-2 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_DEBUG;
function-enumerator = <2>;
gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>;
};
/* SODIMM 58 - USER_LED_2_GREEN */
led-3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DEBUG;
function-enumerator = <2>;
gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
};
};
};
&backlight {
power-supply = <&reg_3p3v>;
};
/* Verdin SPI_1 */
&ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_tpm_cs>;
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, <&gpio3 16 GPIO_ACTIVE_LOW>;
status = "okay";
tpm@1 {
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
reg = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpm_irq>;
interrupt-parent = <&gpio3>;
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
spi-max-frequency = <18500000>;
};
};
/* EEPROM on Mallow */
&eeprom_carrier_board {
status = "okay";
};
/* Verdin ETH_1 */
&eqos {
status = "okay";
};
/* Verdin CAN_1 */
&flexcan1 {
status = "okay";
};
/* Verdin CAN_2 */
&flexcan2 {
status = "okay";
};
/* Temperature sensor on Mallow */
&hwmon_temp {
compatible = "ti,tmp1075";
status = "okay";
};
/* Verdin I2C_2_DSI */
&i2c2 {
status = "okay";
};
/* Verdin I2C_4_CSI */
&i2c3 {
status = "okay";
};
/* Verdin I2C_1 */
&i2c4 {
status = "okay";
};
/* Verdin PCIE_1 */
&pcie {
status = "okay";
};
&pcie_phy {
status = "okay";
};
/* Verdin PWM_1 */
&pwm1 {
status = "okay";
};
/* Verdin PWM_2 */
&pwm2 {
status = "okay";
};
/* Verdin PWM_3_DSI */
&pwm3 {
status = "okay";
};
&reg_usdhc2_vmmc {
vin-supply = <&reg_3p3v>;
};
/* Verdin UART_1 */
&uart1 {
status = "okay";
};
/* Verdin UART_2 */
&uart2 {
status = "okay";
};
/* Verdin UART_3 */
&uart3 {
status = "okay";
};
/* Verdin USB_1 */
&usb3_0 {
status = "okay";
};
&usb3_phy0 {
status = "okay";
};
/* Verdin USB_2 */
&usb3_1 {
status = "okay";
};
&usb3_phy1 {
status = "okay";
};
/* Verdin SD_1 */
&usdhc2 {
status = "okay";
};
&iomuxc {
pinctrl_leds: ledsgrp {
fsl,pins =
<MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00 0x106>, /* SODIMM 52 */
<MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x106>, /* SODIMM 54 */
<MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06 0x106>, /* SODIMM 56 */
<MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07 0x106>; /* SODIMM 58 */
};
pinctrl_tpm_cs: tpmcsgrp {
fsl,pins =
<MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x82>; /* SODIMM 64 */
};
pinctrl_tpm_irq: tpmirqgrp {
fsl,pins =
<MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x16>; /* SODIMM 66 */
};
};

18
arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-mallow.dts Normal file
View File

@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2023 Toradex
*/
/dts-v1/;
#include "imx8mp-verdin.dtsi"
#include "imx8mp-verdin-nonwifi.dtsi"
#include "imx8mp-verdin-mallow.dtsi"
/ {
model = "Toradex Verdin iMX8M Plus on Mallow Board";
compatible = "toradex,verdin-imx8mp-nonwifi-mallow",
"toradex,verdin-imx8mp-nonwifi",
"toradex,verdin-imx8mp",
"fsl,imx8mp";
};

18
arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-mallow.dts Normal file
View File

@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2023 Toradex
*/
/dts-v1/;
#include "imx8mp-verdin.dtsi"
#include "imx8mp-verdin-wifi.dtsi"
#include "imx8mp-verdin-mallow.dtsi"
/ {
model = "Toradex Verdin iMX8M Plus WB on Mallow Board";
compatible = "toradex,verdin-imx8mp-wifi-mallow",
"toradex,verdin-imx8mp-wifi",
"toradex,verdin-imx8mp",
"fsl,imx8mp";
};

30
arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
View File

@ -45,6 +45,23 @@
status = "disabled";
};
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
id-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
label = "Type-C";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_1_id>;
self-powered;
type = "micro";
vbus-supply = <&reg_usb1_vbus>;
port {
usb_dr_connector: endpoint {
remote-endpoint = <&usb3_dwc>;
};
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
@ -835,15 +852,10 @@
srp-disable;
usb-role-switch;
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
id-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
label = "Type-C";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_1_id>;
self-powered;
type = "micro";
vbus-supply = <&reg_usb1_vbus>;
port {
usb3_dwc: endpoint {
remote-endpoint = <&usb_dr_connector>;
};
};
};

28
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@ -264,6 +264,7 @@
dsp_reserved: dsp@92400000 {
reg = <0 0x92400000 0 0x2000000>;
no-map;
status = "disabled";
};
};
@ -726,6 +727,8 @@
clk: clock-controller@30380000 {
compatible = "fsl,imx8mp-ccm";
reg = <0x30380000 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
<&clk_ext3>, <&clk_ext4>;
@ -793,8 +796,8 @@
<&clk IMX8MP_CLK_AUDIO_AXI>;
assigned-clocks = <&clk IMX8MP_CLK_AUDIO_AHB>,
<&clk IMX8MP_CLK_AUDIO_AXI_SRC>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <400000000>,
<600000000>;
};
@ -887,6 +890,15 @@
clocks = <&clk IMX8MP_CLK_ML_AXI>,
<&clk IMX8MP_CLK_ML_AHB>,
<&clk IMX8MP_CLK_NPU_ROOT>;
assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
<&clk IMX8MP_CLK_ML_AXI>,
<&clk IMX8MP_CLK_ML_AHB>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <800000000>,
<800000000>,
<300000000>;
};
};
};
@ -2012,6 +2024,18 @@
interconnect-names = "g1", "g2", "vc8000e";
};
npu: npu@38500000 {
compatible = "vivante,gc";
reg = <0x38500000 0x200000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_NPU_ROOT>,
<&clk IMX8MP_CLK_NPU_ROOT>,
<&clk IMX8MP_CLK_ML_AXI>,
<&clk IMX8MP_CLK_ML_AHB>;
clock-names = "core", "shader", "bus", "reg";
power-domains = <&pgc_mlmix>;
};
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>,

2
arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts
View File

@ -39,7 +39,7 @@
fan: gpio-fan {
compatible = "gpio-fan";
gpio-fan,speed-map = <0 0 8600 1>;
gpio-fan,speed-map = <0 0>, <8600 1>;
gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
#cooling-cells = <2>;
pinctrl-names = "default";

1
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
View File

@ -11,6 +11,7 @@
/ {
model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq";
chassis-type = "embedded";
aliases {
eeprom0 = &eeprom3;

4
arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
View File

@ -117,21 +117,25 @@
&lpuart0 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
dma-names = "rx","tx";
};
&lpuart1 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
dma-names = "rx","tx";
};
&lpuart2 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;
dma-names = "rx","tx";
};
&lpuart3 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;
dma-names = "rx","tx";
};
&i2c0 {

21
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
View File

@ -31,7 +31,7 @@
};
gpio-sbu-mux {
compatible = "gpio-sbu-mux";
compatible = "nxp,cbdtu02043", "gpio-sbu-mux";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_typec_mux>;
select-gpios = <&lsio_gpio5 9 GPIO_ACTIVE_HIGH>;
@ -50,6 +50,10 @@
status = "okay";
};
&dsp_reserved {
status = "okay";
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
@ -152,12 +156,6 @@
interrupt-parent = <&lsio_gpio1>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
port {
typec_dr_sw: endpoint {
remote-endpoint = <&usb3_drd_sw>;
};
};
usb_con1: connector {
compatible = "usb-c-connector";
label = "USB-C";
@ -169,8 +167,17 @@
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec_dr_sw: endpoint {
remote-endpoint = <&usb3_drd_sw>;
};
};
port@1 {
reg = <1>;
typec_con_ss: endpoint {
remote-endpoint = <&usb3_data_ss>;
};

17
arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi Normal file
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@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
/*
* Copyright 2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
&vpu_core0 {
reg = <0x2d040000 0x10000>;
};
&vpu_core1 {
reg = <0x2d050000 0x10000>;
};
/delete-node/ &mu2_m0;
/delete-node/ &vpu_core2;

3
arch/arm64/boot/dts/freescale/imx8qxp.dtsi
View File

@ -48,7 +48,6 @@
serial3 = &lpuart3;
vpu-core0 = &vpu_core0;
vpu-core1 = &vpu_core1;
vpu-core2 = &vpu_core2;
};
cpus {
@ -184,6 +183,7 @@
dsp_reserved: dsp@92400000 {
reg = <0 0x92400000 0 0x2000000>;
no-map;
status = "disabled";
};
encoder_rpc: encoder-rpc@94400000 {
@ -317,6 +317,7 @@
};
#include "imx8qxp-ss-img.dtsi"
#include "imx8qxp-ss-vpu.dtsi"
#include "imx8qxp-ss-adma.dtsi"
#include "imx8qxp-ss-conn.dtsi"
#include "imx8qxp-ss-lsio.dtsi"

31
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
View File

@ -76,6 +76,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
off-on-delay-us = <12000>;
enable-active-high;
};
};
@ -237,18 +238,19 @@
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe
MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
>;
};
@ -265,14 +267,15 @@
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};

709
arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts Normal file
View File

@ -0,0 +1,709 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Markus Niebel
* Author: Alexander Stein
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/pwm/pwm.h>
#include "imx93-tqma9352.dtsi"
/{
model = "TQ-Systems i.MX93 TQMa93xxLA/TQMa93xxCA on MBa93xxCA starter kit";
compatible = "tq,imx93-tqma9352-mba93xxca",
"tq,imx93-tqma9352", "fsl,imx93";
chassis-type = "embedded";
chosen {
stdout-path = &lpuart1;
};
aliases {
eeprom0 = &eeprom0;
rtc0 = &pcf85063;
rtc1 = &bbnsm_rtc;
};
backlight_lvds: backlight {
compatible = "pwm-backlight";
pwms = <&tpm5 0 5000000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
power-supply = <&reg_12v0>;
enable-gpios = <&expander2 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
fan0: pwm-fan {
compatible = "pwm-fan";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwmfan>;
fan-supply = <&reg_pwm_fan>;
#cooling-cells = <2>;
/* typical 25 kHz -> 40.000 nsec */
pwms = <&tpm6 0 40000 PWM_POLARITY_INVERTED>;
cooling-levels = <0 32 64 128 196 240>;
pulses-per-revolution = <2>;
interrupt-parent = <&gpio2>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
switch-a {
label = "switcha";
linux,code = <BTN_0>;
gpios = <&expander0 6 GPIO_ACTIVE_LOW>;
wakeup-source;
};
switch-b {
label = "switchb";
linux,code = <BTN_1>;
gpios = <&expander0 7 GPIO_ACTIVE_LOW>;
wakeup-source;
};
};
gpio-leds {
compatible = "gpio-leds";
led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&expander2 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
led-2 {
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_HEARTBEAT;
gpios = <&expander2 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "V_3V3_MB";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "V_5V0_MB";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_12v0: regulator-12v0 {
compatible = "regulator-fixed";
regulator-name = "V_12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpio = <&expander1 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_mpcie_1v5: regulator-mpcie-1v5 {
compatible = "regulator-fixed";
regulator-name = "V_1V5_MPCIE";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_mpcie_3v3: regulator-mpcie-3v3 {
compatible = "regulator-fixed";
regulator-name = "V_3V3_MPCIE";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_pwm_fan: regulator-pwm-fan {
compatible = "regulator-fixed";
regulator-name = "FAN_PWR";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_12v0>;
};
thermal-zones {
cpu-thermal {
trips {
cpu_active0: trip-active0 {
temperature = <40000>;
hysteresis = <5000>;
type = "active";
};
cpu_active1: trip-active1 {
temperature = <48000>;
hysteresis = <3000>;
type = "active";
};
cpu_active2: trip-active2 {
temperature = <60000>;
hysteresis = <10000>;
type = "active";
};
};
cooling-maps {
map1 {
trip = <&cpu_active0>;
cooling-device = <&fan0 1 1>;
};
map2 {
trip = <&cpu_active1>;
cooling-device = <&fan0 2 2>;
};
map3 {
trip = <&cpu_active2>;
cooling-device = <&fan0 3 3>;
};
};
};
};
};
&adc1 {
status = "okay";
};
&eqos {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eqos>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy_eqos>;
status = "okay";
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
ethphy_eqos: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eqos_phy>;
reset-gpios = <&expander1 0 GPIO_ACTIVE_LOW>;
reset-assert-us = <500000>;
reset-deassert-us = <50000>;
interrupt-parent = <&gpio3>;
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
enet-phy-lane-no-swap;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,dp83867-rxctrl-strap-quirk;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy_fec>;
fsl,magic-packet;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <5000000>;
ethphy_fec: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec_phy>;
reset-gpios = <&expander1 1 GPIO_ACTIVE_LOW>;
reset-assert-us = <500000>;
reset-deassert-us = <50000>;
interrupt-parent = <&gpio3>;
interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
enet-phy-lane-no-swap;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,dp83867-rxctrl-strap-quirk;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <&reg_3v3>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
xceiver-supply = <&reg_3v3>;
status = "okay";
};
&gpio1 {
expander-irq-hog {
gpio-hog;
gpios = <12 GPIO_ACTIVE_LOW>;
input;
line-name = "PEX_INT#";
};
tcpc-irq-hog {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
input;
line-name = "USB_C_ALERT#";
};
};
&lpi2c3 {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <400000>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_lpi2c3>;
pinctrl-1 = <&pinctrl_lpi2c3>;
status = "okay";
temperature-sensor@1c {
compatible = "nxp,se97b", "jedec,jc-42.4-temp";
reg = <0x1c>;
};
eeprom2: eeprom@54 {
compatible = "nxp,se97b", "atmel,24c02";
reg = <0x54>;
pagesize = <16>;
vcc-supply = <&reg_3v3>;
};
expander0: gpio@70 {
compatible = "nxp,pca9538";
reg = <0x70>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pexp_irq>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&gpio1>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
vcc-supply = <&reg_3v3>;
gpio-line-names = "FAN_PWR_EN", "MPCIE_WAKE#",
"MPCIE_1V5_EN", "MPCIE_3V3_EN",
"MPCIE_PERST#", "MPCIE_WDISABLE#",
"BUTTON_A#", "BUTTON_B#";
mpcie-wake-hog {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
input;
line-name = "MPCIE_WAKE#";
};
/*
* Controls the mPCIE slot reset which is low active as
* reset signal. The output-low states, the signal is
* inactive, e.g. not in reset
*/
mpcie_rst_hog: mpcie-rst-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-low;
line-name = "MPCIE_PERST#";
};
/*
* Controls the mPCIE slot WDISABLE pin which is low active
* as disable signal. The output-low states, the signal is
* inactive, e.g. not disabled
*/
mpcie_wdisable_hog: mpcie-wdisable-hog {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-low;
line-name = "MPCIE_WDISABLE#";
};
};
expander1: gpio@71 {
compatible = "nxp,pca9538";
reg = <0x71>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&reg_3v3>;
gpio-line-names = "ENET1_RESET#", "ENET2_RESET#",
"USB_RESET#", "",
"WLAN_PD#", "WLAN_W_DISABLE#",
"WLAN_PERST#", "12V_EN";
/*
* Controls the on board USB Hub reset which is low
* active as reset signal. The output-low states, the
* signal is inactive, e.g. no reset
*/
usb-reset-hog {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-low;
line-name = "USB_RESET#";
};
/*
* Controls the WiFi card PD pin which is low active
* as power down signal. The output-high states, the signal
* is active, e.g. card is powered down
*/
wlan-pd-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-high;
line-name = "WLAN_PD#";
};
/*
* Controls the WiFi card disable pin which is low active
* as disable signal. The output-high states, the signal
* is active, e.g. card is disabled
*/
wlan-wdisable-hog {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-high;
line-name = "WLAN_W_DISABLE#";
};
/*
* Controls the WiFi card reset pin which is low active
* as reset signal. The output-high states, the signal
* is active, e.g. card in reset
*/
wlan-perst-hog {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-high;
line-name = "WLAN_PERST#";
};
};
expander2: gpio@72 {
compatible = "nxp,pca9538";
reg = <0x72>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&reg_3v3>;
gpio-line-names = "LCD_RESET#", "LCD_PWR_EN",
"LCD_BLT_EN", "DP_EN",
"MIPI_CSI_EN", "MIPI_CSI_RST#",
"USER_LED1", "USER_LED2";
};
};
&lpi2c5 {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <400000>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_lpi2c5>;
pinctrl-1 = <&pinctrl_lpi2c5>;
status = "okay";
};
&lpspi6 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_lpspi6>;
pinctrl-1 = <&pinctrl_lpspi6>;
status = "okay";
};
&lpuart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&lpuart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
/* disabled per default, console for M33 */
&lpuart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "disabled";
};
&lpuart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
status = "okay";
};
&lpuart8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart8>;
status = "okay";
};
&tpm5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpm5>;
};
&tpm6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpm6>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2_hs>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_usdhc2_vmmc>;
bus-width = <4>;
no-sdio;
no-mmc;
disable-wp;
status = "okay";
};
&iomuxc {
pinctrl_eqos: eqosgrp {
fsl,pins = <
/* PD | FSEL_2 | DSE X4 */
MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x51e
MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x4000051e
/* PD | FSEL_2 | DSE X6 */
MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
/* PD | FSEL_3 | DSE X6 */
MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x5fe
MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
/* PD | FSEL_2 | DSE X4 */
MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x51e
MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x51e
MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x51e
MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x51e
MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x51e
/* PD | FSEL_3 | DSE X3 */
MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e
>;
};
pinctrl_eqos_phy: eqosphygrp {
fsl,pins = <
MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x1306
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
/* PD | FSEL_2 | DSE X4 */
MX93_PAD_ENET2_MDC__ENET1_MDC 0x51e
MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x4000051e
/* PD | FSEL_2 | DSE X6 */
MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
/* PD | FSEL_3 | DSE X6 */
MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe
MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
/* PD | FSEL_2 | DSE X4 */
MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x51e
MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x51e
MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x51e
MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x51e
MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x51e
/* PD | FSEL_3 | DSE X3 */
MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e
>;
};
pinctrl_fec_phy: fecphygrp {
fsl,pins = <
MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x1306
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e
MX93_PAD_PDM_CLK__CAN1_TX 0x139e
>;
};
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX93_PAD_GPIO_IO25__CAN2_TX 0x139e
MX93_PAD_GPIO_IO27__CAN2_RX 0x139e
>;
};
pinctrl_lpi2c3: lpi2c3grp {
fsl,pins = <
MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
>;
};
pinctrl_lpi2c5: lpi2c5grp {
fsl,pins = <
MX93_PAD_GPIO_IO22__LPI2C5_SDA 0x40000b9e
MX93_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e
>;
};
pinctrl_lpspi6: lpspi6grp {
fsl,pins = <
MX93_PAD_GPIO_IO00__LPSPI6_PCS0 0x3fe
MX93_PAD_GPIO_IO01__LPSPI6_SIN 0x3fe
MX93_PAD_GPIO_IO02__LPSPI6_SOUT 0x3fe
MX93_PAD_GPIO_IO03__LPSPI6_SCK 0x3fe
>;
};
pinctrl_pexp_irq: pexpirqgrp {
fsl,pins = <
MX93_PAD_SAI1_TXC__GPIO1_IO12 0x1306
>;
};
pinctrl_pwmfan: pwmfangrp {
fsl,pins = <
MX93_PAD_GPIO_IO09__GPIO2_IO09 0x1306
>;
};
pinctrl_tpm5: tpm5grp {
fsl,pins = <
MX93_PAD_GPIO_IO06__TPM5_CH0 0x57e
>;
};
pinctrl_tpm6: tpm6grp {
fsl,pins = <
MX93_PAD_GPIO_IO08__TPM6_CH0 0x57e
>;
};
pinctrl_typec: typecgrp {
fsl,pins = <
MX93_PAD_I2C2_SCL__GPIO1_IO02 0x1306
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX93_PAD_UART2_TXD__LPUART2_TX 0x31e
MX93_PAD_UART2_RXD__LPUART2_RX 0x31e
MX93_PAD_SAI1_TXD0__LPUART2_RTS_B 0x51e
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX93_PAD_GPIO_IO14__LPUART3_TX 0x31e
MX93_PAD_GPIO_IO15__LPUART3_RX 0x31e
>;
};
pinctrl_uart6: uart6grp {
fsl,pins = <
MX93_PAD_GPIO_IO04__LPUART6_TX 0x31e
MX93_PAD_GPIO_IO05__LPUART6_RX 0x31e
>;
};
pinctrl_uart8: uart8grp {
fsl,pins = <
MX93_PAD_GPIO_IO12__LPUART8_TX 0x31e
MX93_PAD_GPIO_IO13__LPUART8_RX 0x31e
>;
};
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
>;
};
pinctrl_usdhc2_hs: usdhc2hsgrp {
fsl,pins = <
/* HYS | PD | PU | FSEL_3 | DSE X5 */
MX93_PAD_SD2_CLK__USDHC2_CLK 0x17be
/* HYS | PD | PU | FSEL_3 | DSE X4 */
MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
/* HYS | PD | PU | FSEL_3 | DSE X3 */
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x138e
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x138e
/* PD | PU | FSEL_2 | DSE X3 */
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x50e
>;
};
pinctrl_usdhc2_uhs: usdhc2uhsgrp {
fsl,pins = <
/* HYS | PD | PU | FSEL_3 | DSE X6 */
MX93_PAD_SD2_CLK__USDHC2_CLK 0x17fe
/* HYS | PD | PU | FSEL_3 | DSE X4 */
MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x139e
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x139e
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
/* PD | PU | FSEL_2 | DSE X3 */
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x50e
>;
};
};

1
arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts
View File

@ -18,6 +18,7 @@
model = "TQ-Systems i.MX93 TQMa93xxLA on MBa93xxLA SBC";
compatible = "tq,imx93-tqma9352-mba93xxla",
"tq,imx93-tqma9352", "fsl,imx93";
chassis-type = "embedded";
chosen {
stdout-path = &lpuart1;

127
arch/arm64/boot/dts/freescale/imx93.dtsi
View File

@ -171,6 +171,18 @@
status = "disabled";
};
mqs1: mqs1 {
compatible = "fsl,imx93-mqs";
gpr = <&aonmix_ns_gpr>;
status = "disabled";
};
mqs2: mqs2 {
compatible = "fsl,imx93-mqs";
gpr = <&wakeupmix_gpr>;
status = "disabled";
};
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@ -282,6 +294,19 @@
status = "disabled";
};
i3c1: i3c-master@44330000 {
compatible = "silvaco,i3c-master-v1";
reg = <0x44330000 0x10000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <3>;
#size-cells = <0>;
clocks = <&clk IMX93_CLK_BUS_AON>,
<&clk IMX93_CLK_I3C1_GATE>,
<&clk IMX93_CLK_I3C1_SLOW>;
clock-names = "pclk", "fast_clk", "slow_clk";
status = "disabled";
};
lpi2c1: i2c@44340000 {
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
reg = <0x44340000 0x10000>;
@ -367,6 +392,19 @@
status = "disabled";
};
sai1: sai@443b0000 {
compatible = "fsl,imx93-sai";
reg = <0x443b0000 0x10000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_SAI1_IPG>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_SAI1_GATE>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_DUMMY>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
dmas = <&edma1 22 0 1>, <&edma1 21 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
iomuxc: pinctrl@443c0000 {
compatible = "fsl,imx93-iomuxc";
reg = <0x443c0000 0x10000>;
@ -395,6 +433,8 @@
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>;
clock-names = "osc_32k", "osc_24m", "clk_ext1";
assigned-clocks = <&clk IMX93_CLK_AUDIO_PLL>;
assigned-clock-rates = <393216000>;
status = "okay";
};
@ -422,9 +462,10 @@
};
};
anatop: anatop@44480000 {
compatible = "fsl,imx93-anatop", "syscon";
clock-controller@44480000 {
compatible = "fsl,imx93-anatop";
reg = <0x44480000 0x2000>;
#clock-cells = <1>;
};
tmu: tmu@44482000 {
@ -447,6 +488,21 @@
#thermal-sensor-cells = <1>;
};
micfil: micfil@44520000 {
compatible = "fsl,imx93-micfil";
reg = <0x44520000 0x10000>;
interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_PDM_IPG>,
<&clk IMX93_CLK_PDM_GATE>,
<&clk IMX93_CLK_AUDIO_PLL>;
clock-names = "ipg_clk", "ipg_clk_app", "pll8k";
dmas = <&edma1 29 0 5>;
dma-names = "rx";
status = "disabled";
};
adc1: adc@44530000 {
compatible = "nxp,imx93-adc";
@ -473,7 +529,6 @@
compatible = "fsl,imx93-edma4";
reg = <0x42000000 0x210000>;
#dma-cells = <3>;
shared-interrupt;
dma-channels = <64>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
@ -616,6 +671,19 @@
status = "disabled";
};
i3c2: i3c-master@42520000 {
compatible = "silvaco,i3c-master-v1";
reg = <0x42520000 0x10000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <3>;
#size-cells = <0>;
clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
<&clk IMX93_CLK_I3C2_GATE>,
<&clk IMX93_CLK_I3C2_SLOW>;
clock-names = "pclk", "fast_clk", "slow_clk";
status = "disabled";
};
lpi2c3: i2c@42530000 {
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
reg = <0x42530000 0x10000>;
@ -738,6 +806,51 @@
status = "disabled";
};
sai2: sai@42650000 {
compatible = "fsl,imx93-sai";
reg = <0x42650000 0x10000>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_SAI2_IPG>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_SAI2_GATE>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_DUMMY>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
dmas = <&edma2 59 0 1>, <&edma2 58 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
sai3: sai@42660000 {
compatible = "fsl,imx93-sai";
reg = <0x42660000 0x10000>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_SAI3_IPG>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_SAI3_GATE>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_DUMMY>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
dmas = <&edma2 61 0 1>, <&edma2 60 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
xcvr: xcvr@42680000 {
compatible = "fsl,imx93-xcvr";
reg = <0x42680000 0x800>,
<0x42680800 0x400>,
<0x42680c00 0x080>,
<0x42680e00 0x080>;
reg-names = "ram", "regs", "rxfifo", "txfifo";
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
<&clk IMX93_CLK_SPDIF_GATE>,
<&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_AUD_XCVR_GATE>;
clock-names = "ipg", "phy", "spba", "pll_ipg";
dmas = <&edma2 65 0 1>, <&edma2 66 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
lpuart7: serial@42690000 {
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x42690000 0x1000>;
@ -755,7 +868,7 @@
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART8_GATE>;
clock-names = "ipg";
dmas = <&edma2 90 0 1>, <&edma2 89 0 0>;
dmas = <&edma2 90 0 1>, <&edma2 89 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -874,7 +987,7 @@
<&clk IMX93_CLK_USDHC1_GATE>;
clock-names = "ipg", "ahb", "per";
bus-width = <8>;
fsl,tuning-start-tap = <20>;
fsl,tuning-start-tap = <1>;
fsl,tuning-step = <2>;
status = "disabled";
};
@ -888,7 +1001,7 @@
<&clk IMX93_CLK_USDHC2_GATE>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-start-tap = <1>;
fsl,tuning-step = <2>;
status = "disabled";
};
@ -951,7 +1064,7 @@
<&clk IMX93_CLK_USDHC3_GATE>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-start-tap = <1>;
fsl,tuning-step = <2>;
status = "disabled";
};