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drm/i915/dpio: s/VLV_REF_DW13/VLV_REF_DW11/

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Our VLV_REF_DW13 is actually VLV_REF_DW11. Rename it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240422083457.23815-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä 2024-04-22 11:34:45 +03:00
parent 6e5c5d1ff9
commit 5dad21d36a
2 changed files with 6 additions and 6 deletions
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8
drivers/gpu/drm/i915/display/intel_dpll.c
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@ -1880,19 +1880,19 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv,
reg_val |= 0x00000030;
vlv_dpio_write(dev_priv, phy, VLV_PLL_DW9(1), reg_val);
reg_val = vlv_dpio_read(dev_priv, phy, VLV_REF_DW13);
reg_val = vlv_dpio_read(dev_priv, phy, VLV_REF_DW11);
reg_val &= 0x00ffffff;
reg_val |= 0x8c000000;
vlv_dpio_write(dev_priv, phy, VLV_REF_DW13, reg_val);
vlv_dpio_write(dev_priv, phy, VLV_REF_DW11, reg_val);
reg_val = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW9(1));
reg_val &= 0xffffff00;
vlv_dpio_write(dev_priv, phy, VLV_PLL_DW9(1), reg_val);
reg_val = vlv_dpio_read(dev_priv, phy, VLV_REF_DW13);
reg_val = vlv_dpio_read(dev_priv, phy, VLV_REF_DW11);
reg_val &= 0x00ffffff;
reg_val |= 0xb0000000;
vlv_dpio_write(dev_priv, phy, VLV_REF_DW13, reg_val);
vlv_dpio_write(dev_priv, phy, VLV_REF_DW11, reg_val);
}
static void vlv_prepare_pll(const struct intel_crtc_state *crtc_state)

4
drivers/gpu/drm/i915/i915_reg.h
View File

@ -246,8 +246,8 @@
#define _VLV_PLL_DW11_CH1 0x806c
#define VLV_PLL_DW11(ch) _PIPE(ch, _VLV_PLL_DW11_CH0, _VLV_PLL_DW11_CH1)
/* Spec for ref block start counts at DW10 */
#define VLV_REF_DW13 0x80ac
/* Spec for ref block start counts at DW8 */
#define VLV_REF_DW11 0x80ac
#define VLV_CMN_DW0 0x8100