drm/amdgpu/powerplay: add smu ip block for renoir (v2)
add swSMU [smu_v12_0] for renoir v2: whitespace fixes (Alex) Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -762,6 +762,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &psp_v12_0_ip_block);
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amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
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amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
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if (is_support_sw_smu(adev))
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amdgpu_device_ip_block_add(adev, &smu_v12_0_ip_block);
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if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
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@ -35,7 +35,7 @@ AMD_POWERPLAY = $(addsuffix /Makefile,$(addprefix $(FULL_AMD_PATH)/powerplay/,$(
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include $(AMD_POWERPLAY)
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POWER_MGR = amd_powerplay.o amdgpu_smu.o smu_v11_0.o vega20_ppt.o arcturus_ppt.o navi10_ppt.o
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POWER_MGR = amd_powerplay.o amdgpu_smu.o smu_v11_0.o smu_v12_0.o vega20_ppt.o arcturus_ppt.o navi10_ppt.o renoir_ppt.o
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AMD_PP_POWER = $(addprefix $(AMD_PP_PATH)/,$(POWER_MGR))
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@ -27,6 +27,7 @@
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#include "amdgpu_smu.h"
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#include "soc15_common.h"
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#include "smu_v11_0.h"
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#include "smu_v12_0.h"
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#include "atom.h"
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#include "amd_pcie.h"
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@ -735,6 +736,12 @@ static int smu_set_funcs(struct amdgpu_device *adev)
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smu->od_enabled = true;
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smu_v11_0_set_smu_funcs(smu);
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break;
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case CHIP_RENOIR:
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adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
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if (adev->pm.pp_feature & PP_OVERDRIVE_MASK)
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smu->od_enabled = true;
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smu_v12_0_set_smu_funcs(smu);
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break;
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default:
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return -EINVAL;
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}
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@ -1031,6 +1038,9 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
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struct amdgpu_device *adev = smu->adev;
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int ret;
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if (adev->flags & AMD_IS_APU)
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return 0;
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if (smu_is_dpm_running(smu) && adev->in_suspend) {
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pr_info("dpm has been enabled\n");
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return 0;
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@ -1790,3 +1800,12 @@ const struct amdgpu_ip_block_version smu_v11_0_ip_block =
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.rev = 0,
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.funcs = &smu_ip_funcs,
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};
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const struct amdgpu_ip_block_version smu_v12_0_ip_block =
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{
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.type = AMD_IP_BLOCK_TYPE_SMC,
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.major = 12,
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.minor = 0,
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.rev = 0,
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.funcs = &smu_ip_funcs,
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};
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@ -755,6 +755,8 @@ extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table,
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extern const struct amd_ip_funcs smu_ip_funcs;
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extern const struct amdgpu_ip_block_version smu_v11_0_ip_block;
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extern const struct amdgpu_ip_block_version smu_v12_0_ip_block;
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extern int smu_feature_init_dpm(struct smu_context *smu);
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extern int smu_feature_is_enabled(struct smu_context *smu,
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