iio: adc: Add Spreadtrum SC27XX PMICs ADC support
The Spreadtrum SC27XX PMICs ADC controller contains 32 channels, which is used to sample voltages with 12 bits conversion. [Baolin Wang did lots of improvements] Signed-off-by: Freeman Liu <freeman.liu@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Freeman Liu
Jonathan Cameron
parent
d93de07a12
commit
5df362a6cf
@ -620,6 +620,16 @@ config ROCKCHIP_SARADC
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To compile this driver as a module, choose M here: the
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module will be called rockchip_saradc.
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config SC27XX_ADC
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tristate "Spreadtrum SC27xx series PMICs ADC"
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depends on MFD_SC27XX_PMIC || COMPILE_TEST
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help
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Say yes here to build support for the integrated ADC inside the
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Spreadtrum SC27xx series PMICs.
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This driver can also be built as a module. If so, the module
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will be called sc27xx_adc.
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config SPEAR_ADC
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tristate "ST SPEAr ADC"
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depends on PLAT_SPEAR || COMPILE_TEST
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@ -59,6 +59,7 @@ obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
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obj-$(CONFIG_QCOM_PM8XXX_XOADC) += qcom-pm8xxx-xoadc.o
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obj-$(CONFIG_RCAR_GYRO_ADC) += rcar-gyroadc.o
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obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
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obj-$(CONFIG_SC27XX_ADC) += sc27xx_adc.o
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obj-$(CONFIG_SPEAR_ADC) += spear_adc.o
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obj-$(CONFIG_STX104) += stx104.o
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obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o
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522
drivers/iio/adc/sc27xx_adc.c
Normal file
522
drivers/iio/adc/sc27xx_adc.c
Normal file
@ -0,0 +1,522 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2018 Spreadtrum Communications Inc.
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#include <linux/hwspinlock.h>
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#include <linux/iio/iio.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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/* PMIC global registers definition */
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#define SC27XX_MODULE_EN 0xc08
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#define SC27XX_MODULE_ADC_EN BIT(5)
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#define SC27XX_ARM_CLK_EN 0xc10
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#define SC27XX_CLK_ADC_EN BIT(5)
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#define SC27XX_CLK_ADC_CLK_EN BIT(6)
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/* ADC controller registers definition */
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#define SC27XX_ADC_CTL 0x0
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#define SC27XX_ADC_CH_CFG 0x4
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#define SC27XX_ADC_DATA 0x4c
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#define SC27XX_ADC_INT_EN 0x50
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#define SC27XX_ADC_INT_CLR 0x54
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#define SC27XX_ADC_INT_STS 0x58
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#define SC27XX_ADC_INT_RAW 0x5c
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/* Bits and mask definition for SC27XX_ADC_CTL register */
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#define SC27XX_ADC_EN BIT(0)
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#define SC27XX_ADC_CHN_RUN BIT(1)
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#define SC27XX_ADC_12BIT_MODE BIT(2)
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#define SC27XX_ADC_RUN_NUM_MASK GENMASK(7, 4)
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#define SC27XX_ADC_RUN_NUM_SHIFT 4
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/* Bits and mask definition for SC27XX_ADC_CH_CFG register */
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#define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0)
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#define SC27XX_ADC_SCALE_MASK GENMASK(10, 8)
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#define SC27XX_ADC_SCALE_SHIFT 8
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/* Bits definitions for SC27XX_ADC_INT_EN registers */
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#define SC27XX_ADC_IRQ_EN BIT(0)
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/* Bits definitions for SC27XX_ADC_INT_CLR registers */
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#define SC27XX_ADC_IRQ_CLR BIT(0)
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/* Mask definition for SC27XX_ADC_DATA register */
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#define SC27XX_ADC_DATA_MASK GENMASK(11, 0)
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/* Timeout (ms) for the trylock of hardware spinlocks */
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#define SC27XX_ADC_HWLOCK_TIMEOUT 5000
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/* Maximum ADC channel number */
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#define SC27XX_ADC_CHANNEL_MAX 32
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/* ADC voltage ratio definition */
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#define SC27XX_VOLT_RATIO(n, d) \
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(((n) << SC27XX_RATIO_NUMERATOR_OFFSET) | (d))
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#define SC27XX_RATIO_NUMERATOR_OFFSET 16
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#define SC27XX_RATIO_DENOMINATOR_MASK GENMASK(15, 0)
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struct sc27xx_adc_data {
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struct device *dev;
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struct regmap *regmap;
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/*
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* One hardware spinlock to synchronize between the multiple
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* subsystems which will access the unique ADC controller.
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*/
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struct hwspinlock *hwlock;
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struct completion completion;
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int channel_scale[SC27XX_ADC_CHANNEL_MAX];
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u32 base;
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int value;
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int irq;
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};
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struct sc27xx_adc_linear_graph {
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int volt0;
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int adc0;
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int volt1;
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int adc1;
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};
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/*
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* According to the datasheet, we can convert one ADC value to one voltage value
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* through 2 points in the linear graph. If the voltage is less than 1.2v, we
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* should use the small-scale graph, and if more than 1.2v, we should use the
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* big-scale graph.
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*/
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static const struct sc27xx_adc_linear_graph big_scale_graph = {
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4200, 3310,
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3600, 2832,
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};
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static const struct sc27xx_adc_linear_graph small_scale_graph = {
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1000, 3413,
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100, 341,
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};
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static int sc27xx_adc_get_ratio(int channel, int scale)
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{
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switch (channel) {
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case 1:
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case 2:
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case 3:
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case 4:
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return scale ? SC27XX_VOLT_RATIO(400, 1025) :
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SC27XX_VOLT_RATIO(1, 1);
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case 5:
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return SC27XX_VOLT_RATIO(7, 29);
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case 6:
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return SC27XX_VOLT_RATIO(375, 9000);
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case 7:
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case 8:
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return scale ? SC27XX_VOLT_RATIO(100, 125) :
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SC27XX_VOLT_RATIO(1, 1);
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case 19:
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return SC27XX_VOLT_RATIO(1, 3);
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default:
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return SC27XX_VOLT_RATIO(1, 1);
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}
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return SC27XX_VOLT_RATIO(1, 1);
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}
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static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel,
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int scale, int *val)
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{
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int ret;
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u32 tmp;
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reinit_completion(&data->completion);
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ret = hwspin_lock_timeout_raw(data->hwlock, SC27XX_ADC_HWLOCK_TIMEOUT);
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if (ret) {
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dev_err(data->dev, "timeout to get the hwspinlock\n");
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return ret;
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}
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ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL,
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SC27XX_ADC_EN, SC27XX_ADC_EN);
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if (ret)
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goto unlock_adc;
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/* Configure the channel id and scale */
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tmp = (scale << SC27XX_ADC_SCALE_SHIFT) & SC27XX_ADC_SCALE_MASK;
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tmp |= channel & SC27XX_ADC_CHN_ID_MASK;
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ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CH_CFG,
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SC27XX_ADC_CHN_ID_MASK | SC27XX_ADC_SCALE_MASK,
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tmp);
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if (ret)
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goto disable_adc;
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/* Select 12bit conversion mode, and only sample 1 time */
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tmp = SC27XX_ADC_12BIT_MODE;
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tmp |= (0 << SC27XX_ADC_RUN_NUM_SHIFT) & SC27XX_ADC_RUN_NUM_MASK;
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ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL,
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SC27XX_ADC_RUN_NUM_MASK | SC27XX_ADC_12BIT_MODE,
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tmp);
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if (ret)
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goto disable_adc;
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ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL,
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SC27XX_ADC_CHN_RUN, SC27XX_ADC_CHN_RUN);
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if (ret)
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goto disable_adc;
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wait_for_completion(&data->completion);
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disable_adc:
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regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL,
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SC27XX_ADC_EN, 0);
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unlock_adc:
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hwspin_unlock_raw(data->hwlock);
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if (!ret)
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*val = data->value;
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return ret;
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}
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static irqreturn_t sc27xx_adc_isr(int irq, void *dev_id)
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{
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struct sc27xx_adc_data *data = dev_id;
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int ret;
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ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_INT_CLR,
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SC27XX_ADC_IRQ_CLR, SC27XX_ADC_IRQ_CLR);
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if (ret)
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return IRQ_RETVAL(ret);
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ret = regmap_read(data->regmap, data->base + SC27XX_ADC_DATA,
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&data->value);
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if (ret)
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return IRQ_RETVAL(ret);
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data->value &= SC27XX_ADC_DATA_MASK;
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complete(&data->completion);
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return IRQ_HANDLED;
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}
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static void sc27xx_adc_volt_ratio(struct sc27xx_adc_data *data,
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int channel, int scale,
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u32 *div_numerator, u32 *div_denominator)
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{
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u32 ratio = sc27xx_adc_get_ratio(channel, scale);
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*div_numerator = ratio >> SC27XX_RATIO_NUMERATOR_OFFSET;
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*div_denominator = ratio & SC27XX_RATIO_DENOMINATOR_MASK;
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}
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static int sc27xx_adc_to_volt(const struct sc27xx_adc_linear_graph *graph,
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int raw_adc)
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{
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int tmp;
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tmp = (graph->volt0 - graph->volt1) * (raw_adc - graph->adc1);
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tmp /= (graph->adc0 - graph->adc1);
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tmp += graph->volt1;
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return tmp < 0 ? 0 : tmp;
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}
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static int sc27xx_adc_convert_volt(struct sc27xx_adc_data *data, int channel,
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int scale, int raw_adc)
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{
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u32 numerator, denominator;
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u32 volt;
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/*
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* Convert ADC values to voltage values according to the linear graph,
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* and channel 5 and channel 1 has been calibrated, so we can just
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* return the voltage values calculated by the linear graph. But other
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* channels need be calculated to the real voltage values with the
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* voltage ratio.
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*/
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switch (channel) {
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case 5:
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return sc27xx_adc_to_volt(&big_scale_graph, raw_adc);
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case 1:
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return sc27xx_adc_to_volt(&small_scale_graph, raw_adc);
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default:
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volt = sc27xx_adc_to_volt(&small_scale_graph, raw_adc);
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break;
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}
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sc27xx_adc_volt_ratio(data, channel, scale, &numerator, &denominator);
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return (volt * denominator + numerator / 2) / numerator;
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}
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static int sc27xx_adc_read_processed(struct sc27xx_adc_data *data,
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int channel, int scale, int *val)
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{
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int ret, raw_adc;
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ret = sc27xx_adc_read(data, channel, scale, &raw_adc);
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if (ret)
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return ret;
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*val = sc27xx_adc_convert_volt(data, channel, scale, raw_adc);
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return 0;
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}
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static int sc27xx_adc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct sc27xx_adc_data *data = iio_priv(indio_dev);
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int scale = data->channel_scale[chan->channel];
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int ret, tmp;
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switch (mask) {
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case IIO_CHAN_INFO_PROCESSED:
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mutex_lock(&indio_dev->mlock);
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ret = sc27xx_adc_read_processed(data, chan->channel, scale,
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&tmp);
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mutex_unlock(&indio_dev->mlock);
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if (ret)
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return ret;
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*val = tmp;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = scale;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static int sc27xx_adc_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct sc27xx_adc_data *data = iio_priv(indio_dev);
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switch (mask) {
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case IIO_CHAN_INFO_SCALE:
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data->channel_scale[chan->channel] = val;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info sc27xx_info = {
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.read_raw = &sc27xx_adc_read_raw,
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.write_raw = &sc27xx_adc_write_raw,
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};
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#define SC27XX_ADC_CHANNEL(index) { \
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.type = IIO_VOLTAGE, \
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.channel = index, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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.datasheet_name = "CH##index", \
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.indexed = 1, \
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}
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static const struct iio_chan_spec sc27xx_channels[] = {
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SC27XX_ADC_CHANNEL(0),
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SC27XX_ADC_CHANNEL(1),
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SC27XX_ADC_CHANNEL(2),
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SC27XX_ADC_CHANNEL(3),
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SC27XX_ADC_CHANNEL(4),
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SC27XX_ADC_CHANNEL(5),
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SC27XX_ADC_CHANNEL(6),
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SC27XX_ADC_CHANNEL(7),
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SC27XX_ADC_CHANNEL(8),
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SC27XX_ADC_CHANNEL(9),
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SC27XX_ADC_CHANNEL(10),
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SC27XX_ADC_CHANNEL(11),
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SC27XX_ADC_CHANNEL(12),
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SC27XX_ADC_CHANNEL(13),
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SC27XX_ADC_CHANNEL(14),
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SC27XX_ADC_CHANNEL(15),
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SC27XX_ADC_CHANNEL(16),
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SC27XX_ADC_CHANNEL(17),
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SC27XX_ADC_CHANNEL(18),
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SC27XX_ADC_CHANNEL(19),
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SC27XX_ADC_CHANNEL(20),
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SC27XX_ADC_CHANNEL(21),
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SC27XX_ADC_CHANNEL(22),
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SC27XX_ADC_CHANNEL(23),
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SC27XX_ADC_CHANNEL(24),
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SC27XX_ADC_CHANNEL(25),
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SC27XX_ADC_CHANNEL(26),
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SC27XX_ADC_CHANNEL(27),
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SC27XX_ADC_CHANNEL(28),
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SC27XX_ADC_CHANNEL(29),
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SC27XX_ADC_CHANNEL(30),
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SC27XX_ADC_CHANNEL(31),
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};
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static int sc27xx_adc_enable(struct sc27xx_adc_data *data)
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{
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int ret;
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ret = regmap_update_bits(data->regmap, SC27XX_MODULE_EN,
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SC27XX_MODULE_ADC_EN, SC27XX_MODULE_ADC_EN);
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if (ret)
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return ret;
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/* Enable ADC work clock and controller clock */
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ret = regmap_update_bits(data->regmap, SC27XX_ARM_CLK_EN,
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SC27XX_CLK_ADC_EN | SC27XX_CLK_ADC_CLK_EN,
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SC27XX_CLK_ADC_EN | SC27XX_CLK_ADC_CLK_EN);
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if (ret)
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goto disable_adc;
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ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_INT_EN,
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SC27XX_ADC_IRQ_EN, SC27XX_ADC_IRQ_EN);
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if (ret)
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goto disable_clk;
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return 0;
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disable_clk:
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regmap_update_bits(data->regmap, SC27XX_ARM_CLK_EN,
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SC27XX_CLK_ADC_EN | SC27XX_CLK_ADC_CLK_EN, 0);
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disable_adc:
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regmap_update_bits(data->regmap, SC27XX_MODULE_EN,
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SC27XX_MODULE_ADC_EN, 0);
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return ret;
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}
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static void sc27xx_adc_disable(void *_data)
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{
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struct sc27xx_adc_data *data = _data;
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regmap_update_bits(data->regmap, data->base + SC27XX_ADC_INT_EN,
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SC27XX_ADC_IRQ_EN, 0);
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/* Disable ADC work clock and controller clock */
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regmap_update_bits(data->regmap, SC27XX_ARM_CLK_EN,
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SC27XX_CLK_ADC_EN | SC27XX_CLK_ADC_CLK_EN, 0);
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regmap_update_bits(data->regmap, SC27XX_MODULE_EN,
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SC27XX_MODULE_ADC_EN, 0);
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}
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static void sc27xx_adc_free_hwlock(void *_data)
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{
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struct hwspinlock *hwlock = _data;
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hwspin_lock_free(hwlock);
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}
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static int sc27xx_adc_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
|
||||
struct sc27xx_adc_data *sc27xx_data;
|
||||
struct iio_dev *indio_dev;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*sc27xx_data));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
sc27xx_data = iio_priv(indio_dev);
|
||||
|
||||
sc27xx_data->regmap = dev_get_regmap(pdev->dev.parent, NULL);
|
||||
if (!sc27xx_data->regmap) {
|
||||
dev_err(&pdev->dev, "failed to get ADC regmap\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = of_property_read_u32(np, "reg", &sc27xx_data->base);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to get ADC base address\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
sc27xx_data->irq = platform_get_irq(pdev, 0);
|
||||
if (sc27xx_data->irq < 0) {
|
||||
dev_err(&pdev->dev, "failed to get ADC irq number\n");
|
||||
return sc27xx_data->irq;
|
||||
}
|
||||
|
||||
ret = of_hwspin_lock_get_id(np, 0);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "failed to get hwspinlock id\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
sc27xx_data->hwlock = hwspin_lock_request_specific(ret);
|
||||
if (!sc27xx_data->hwlock) {
|
||||
dev_err(&pdev->dev, "failed to request hwspinlock\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
ret = devm_add_action(&pdev->dev, sc27xx_adc_free_hwlock,
|
||||
sc27xx_data->hwlock);
|
||||
if (ret) {
|
||||
sc27xx_adc_free_hwlock(sc27xx_data->hwlock);
|
||||
dev_err(&pdev->dev, "failed to add hwspinlock action\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
init_completion(&sc27xx_data->completion);
|
||||
sc27xx_data->dev = &pdev->dev;
|
||||
|
||||
ret = sc27xx_adc_enable(sc27xx_data);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to enable ADC module\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_add_action(&pdev->dev, sc27xx_adc_disable, sc27xx_data);
|
||||
if (ret) {
|
||||
sc27xx_adc_disable(sc27xx_data);
|
||||
dev_err(&pdev->dev, "failed to add ADC disable action\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_request_threaded_irq(&pdev->dev, sc27xx_data->irq, NULL,
|
||||
sc27xx_adc_isr, IRQF_ONESHOT,
|
||||
pdev->name, sc27xx_data);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to request ADC irq\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
indio_dev->dev.parent = &pdev->dev;
|
||||
indio_dev->name = dev_name(&pdev->dev);
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->info = &sc27xx_info;
|
||||
indio_dev->channels = sc27xx_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(sc27xx_channels);
|
||||
ret = devm_iio_device_register(&pdev->dev, indio_dev);
|
||||
if (ret)
|
||||
dev_err(&pdev->dev, "could not register iio (ADC)");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct of_device_id sc27xx_adc_of_match[] = {
|
||||
{ .compatible = "sprd,sc2731-adc", },
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct platform_driver sc27xx_adc_driver = {
|
||||
.probe = sc27xx_adc_probe,
|
||||
.driver = {
|
||||
.name = "sc27xx-adc",
|
||||
.of_match_table = sc27xx_adc_of_match,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(sc27xx_adc_driver);
|
||||
|
||||
MODULE_AUTHOR("Freeman Liu <freeman.liu@spreadtrum.com>");
|
||||
MODULE_DESCRIPTION("Spreadtrum SC27XX ADC Driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue
Block a user