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pata_hpt3x2n: fix writing to wrong register in hpt3x2n_bmdma_stop()

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The driver's bmdma_stop() method writes to the wrong PCI config register
(0x52 intead of 0x54) when trying to clear the state machine on secondary
channel -- "luckily", the write falls on a read-only part of the primary
channel MISC. control 3 register, so no collateral damage is done...

Alan Cox fixed the HPT37x driver in commit 6929da4427b4 ("[PATCH] hpt37x:
Two important bug fixes") but forgot to check the HPT3x2N driver which has
the same bug. :-/

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
This commit is contained in:
Sergey Shtylyov 2022-02-07 23:32:20 +03:00 committed by Damien Le Moal
parent a565ed1b9b
commit 5dfb84982e
1 changed files with 2 additions and 2 deletions
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4
drivers/ata/pata_hpt3x2n.c
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@ -24,7 +24,7 @@
#include <linux/libata.h>
#define DRV_NAME "pata_hpt3x2n"
#define DRV_VERSION "0.3.16"
#define DRV_VERSION "0.3.17"
enum {
HPT_PCI_FAST = (1 << 31),
@ -251,7 +251,7 @@ static void hpt3x2n_bmdma_stop(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int mscreg = 0x50 + 2 * ap->port_no;
int mscreg = 0x50 + 4 * ap->port_no;
u8 bwsr_stat, msc_stat;
pci_read_config_byte(pdev, 0x6A, &bwsr_stat);