Devicetree fixes for v6.6, part 2:
- Fix potential memory leak in of_changeset_action() - Fix some i.MX binding warnings - Fix typo in renesas,vin binding field-even-active property - Fix andestech,ax45mp-cache example unit-address - Add missing additionalProperties on RiscV CPU interrupt-controller node - Add missing unevaluatedProperties on media bindings - Fix brcm,iproc-pcie binding 'msi' child node schema - Fix MEMSIC MXC4005 compatible string -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmUgWHMACgkQ+vtdtY28 YcN93RAAoENqp3ArpOaXSuXRwHvd8jq2HXZ9JK+HgxlmyPkgguvvOef+dNmIvq4g +0ILIWs5H4PQggihLeU2xn6h++ZhOGAbXxzMx3J7cL7NcI76VYf1BvMIQci57rDh E7GvAWA3oWNJBqNU5RRRgKbHBApYFVyWZ8VgEvbZ9ouYnm0FPy1GPykdf3pJy3D4 0HBfM2UVEriawLvms6MGiCemyRmRPnFIrKfOrpfekecFzLhCZ6am3MaPLQj1Fy6m d9ieSHmcSZZ2uhtdp9qf/tvl6qy1Q+3aodKjTxZAVxLRQHmsmyZRXXDLnwjP+u4d atcTL0+5D0PgrO0yknT2zlqf7QlVi4k6Mep4x8OJ1CaAIvP6G4p3Do3V5QFXzDlI fWXgaO1t88QbItKk8U2VYqLBVfqYTrr6S/9SuwWakYWOGQf00PyVSjkYsNHITYpJ nP4sKKddo0q0lX6vhkzq+Yq87bZDh9KksETepRZQH4rOgyW7OceAlPEOe2y1rDc5 NllcLc36B3MPnIfWhTu/M7Xc3OGeprmKvNEZ6sXeSwuBW54rfvtlpZ3ATHVW8OEi kt9+79mcgoLIN2UMTUMUiflxo6MVE8rMdG5hedG+zPZ64hv+EWaUzn1cZoIELkOl OLn22mkDWn2fl5IGBgwAFp0Y+gV6XIGHUd1dKJbZ1bZHY4OT7zE= =BU3m -----END PGP SIGNATURE----- Merge tag 'devicetree-fixes-for-6.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Fix potential memory leak in of_changeset_action() - Fix some i.MX binding warnings - Fix typo in renesas,vin binding field-even-active property - Fix andestech,ax45mp-cache example unit-address - Add missing additionalProperties on RiscV CPU interrupt-controller node - Add missing unevaluatedProperties on media bindings - Fix brcm,iproc-pcie binding 'msi' child node schema - Fix MEMSIC MXC4005 compatible string * tag 'devicetree-fixes-for-6.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: trivial-devices: Fix MEMSIC MXC4005 compatible string dt-bindings: PCI: brcm,iproc-pcie: Fix 'msi' child node schema dt-bindings: PCI: brcm,iproc-pcie: Drop common pci-bus properties dt-bindings: PCI: brcm,iproc-pcie: Fix example indentation media: dt-bindings: Add missing unevaluatedProperties on child node schemas dt-bindings: bus: fsl,imx8qxp-pixel-link-msi-bus: Drop child 'reg' property media: dt-bindings: imx7-csi: Make power-domains not required for imx8mq dt-bindings: media: renesas,vin: Fix field-even-active spelling dt-bindings: cache: andestech,ax45mp-cache: Fix unit address in example of: overlay: Reorder struct fragment fields kerneldoc dt-bindings: display: fsl,imx6-hdmi: Change to 'unevaluatedProperties: false' dt-bindings: riscv: cpus: Add missing additionalProperties on interrupt-controller node of: dynamic: Fix potential memory leak in of_changeset_action()
This commit is contained in:
commit
5e5558f5c9
@ -73,9 +73,6 @@ patternProperties:
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"^.*@[0-9a-f]+$":
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description: Devices attached to the bus
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type: object
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properties:
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reg:
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maxItems: 1
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required:
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- reg
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@ -69,7 +69,7 @@ examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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cache-controller@2010000 {
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cache-controller@13400000 {
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compatible = "andestech,ax45mp-cache", "cache";
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reg = <0x13400000 0x100000>;
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interrupts = <508 IRQ_TYPE_LEVEL_HIGH>;
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@ -87,7 +87,7 @@ required:
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- interrupts
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- ports
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additionalProperties: false
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unevaluatedProperties: false
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examples:
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- |
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@ -54,6 +54,7 @@ properties:
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port:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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properties:
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endpoint:
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@ -69,6 +69,7 @@ properties:
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: Input port
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properties:
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@ -89,6 +90,7 @@ properties:
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port@1:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: Output port
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properties:
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@ -59,7 +59,6 @@ allOf:
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compatible:
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contains:
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enum:
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- fsl,imx8mq-csi
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- fsl,imx8mm-csi
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then:
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required:
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@ -95,7 +95,7 @@ properties:
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synchronization is selected.
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default: 1
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field-active-even: true
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field-even-active: true
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bus-width: true
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@ -144,7 +144,7 @@ properties:
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synchronization is selected.
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default: 1
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field-active-even: true
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field-even-active: true
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bus-width: true
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@ -57,6 +57,7 @@ properties:
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patternProperties:
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"^port@[01]$":
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Camera A and camera B inputs.
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@ -12,7 +12,6 @@ maintainers:
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allOf:
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- $ref: /schemas/pci/pci-bus.yaml#
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- $ref: /schemas/interrupt-controller/msi-controller.yaml#
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properties:
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compatible:
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@ -34,13 +33,6 @@ properties:
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description: >
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Base address and length of the PCIe controller I/O register space
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interrupt-map: true
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interrupt-map-mask: true
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"#interrupt-cells":
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const: 1
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ranges:
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minItems: 1
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maxItems: 2
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@ -54,16 +46,8 @@ properties:
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items:
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- const: pcie-phy
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bus-range: true
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dma-coherent: true
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"#address-cells": true
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"#size-cells": true
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device_type: true
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brcm,pcie-ob:
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type: boolean
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description: >
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@ -78,21 +62,25 @@ properties:
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msi:
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type: object
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$ref: /schemas/interrupt-controller/msi-controller.yaml#
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unevaluatedProperties: false
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properties:
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compatible:
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items:
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- const: brcm,iproc-msi
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interrupts:
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maxItems: 4
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brcm,pcie-msi-inten:
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type: boolean
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description:
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Needs to be present for some older iProc platforms that require the
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interrupt enable registers to be set explicitly to enable MSI
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msi-parent: true
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msi-controller: true
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brcm,pcie-msi-inten:
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type: boolean
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description: >
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Needs to be present for some older iProc platforms that require the
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interrupt enable registers to be set explicitly to enable MSI
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dependencies:
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brcm,pcie-ob-axi-offset: ["brcm,pcie-ob"]
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brcm,pcie-msi-inten: [msi-controller]
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@ -117,68 +105,69 @@ unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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bus {
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#address-cells = <1>;
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#size-cells = <1>;
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pcie0: pcie@18012000 {
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compatible = "brcm,iproc-pcie";
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reg = <0x18012000 0x1000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
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<0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
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phys = <&phy 0 5>;
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phy-names = "pcie-phy";
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brcm,pcie-ob;
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brcm,pcie-ob-axi-offset = <0x00000000>;
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msi-parent = <&msi0>;
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/* iProc event queue based MSI */
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msi0: msi {
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compatible = "brcm,iproc-msi";
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msi-controller;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
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<GIC_SPI 97 IRQ_TYPE_NONE>,
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<GIC_SPI 98 IRQ_TYPE_NONE>,
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<GIC_SPI 99 IRQ_TYPE_NONE>;
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};
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};
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pcie1: pcie@18013000 {
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compatible = "brcm,iproc-pcie";
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reg = <0x18013000 0x1000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
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linux,pci-domain = <1>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
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<0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
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phys = <&phy 1 6>;
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phy-names = "pcie-phy";
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};
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gic: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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pcie@18012000 {
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compatible = "brcm,iproc-pcie";
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reg = <0x18012000 0x1000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
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<0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
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phys = <&phy 0 5>;
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phy-names = "pcie-phy";
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brcm,pcie-ob;
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brcm,pcie-ob-axi-offset = <0x00000000>;
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msi-parent = <&msi0>;
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/* iProc event queue based MSI */
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msi0: msi {
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compatible = "brcm,iproc-msi";
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msi-controller;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
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<GIC_SPI 97 IRQ_TYPE_NONE>,
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<GIC_SPI 98 IRQ_TYPE_NONE>,
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<GIC_SPI 99 IRQ_TYPE_NONE>;
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};
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};
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- |
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pcie@18013000 {
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compatible = "brcm,iproc-pcie";
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reg = <0x18013000 0x1000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
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linux,pci-domain = <1>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
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<0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
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phys = <&phy 1 6>;
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phy-names = "pcie-phy";
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};
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interrupt-controller:
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type: object
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additionalProperties: false
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description: Describes the CPU's local interrupt controller
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properties:
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@ -232,7 +232,7 @@ properties:
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# MEMSIC magnetometer
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- memsic,mmc35240
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# MEMSIC 3-axis accelerometer
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- memsic,mx4005
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- memsic,mxc4005
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# MEMSIC 2-axis 8-bit digital accelerometer
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- memsic,mxc6225
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# MEMSIC 2-axis 8-bit digital accelerometer
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@ -890,13 +890,13 @@ int of_changeset_action(struct of_changeset *ocs, unsigned long action,
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{
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struct of_changeset_entry *ce;
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if (WARN_ON(action >= ARRAY_SIZE(action_names)))
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return -EINVAL;
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ce = kzalloc(sizeof(*ce), GFP_KERNEL);
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if (!ce)
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return -ENOMEM;
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if (WARN_ON(action >= ARRAY_SIZE(action_names)))
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return -EINVAL;
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/* get a reference to the node */
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ce->action = action;
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ce->np = of_node_get(np);
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@ -45,8 +45,8 @@ struct target {
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/**
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* struct fragment - info about fragment nodes in overlay expanded device tree
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* @target: target of the overlay operation
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* @overlay: pointer to the __overlay__ node
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* @target: target of the overlay operation
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*/
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struct fragment {
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struct device_node *overlay;
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