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riscv: dts: starfive: jh7100: Add PWM node and pins configuration

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Add OpenCores PWM controller node and add PWM pins configuration
on VisionFive 1 board.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
William Qiu 2023-12-22 17:45:47 +08:00 committed by Conor Dooley
parent 2529085831
commit 5e598b99fe
2 changed files with 33 additions and 0 deletions
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24
arch/riscv/boot/dts/starfive/jh7100-common.dtsi
View File

@ -115,6 +115,24 @@
};
};
pwm_pins: pwm-0 {
pwm-pins {
pinmux = <GPIOMUX(7,
GPO_PWM_PAD_OUT_BIT0,
GPO_PWM_PAD_OE_N_BIT0,
GPI_NONE)>,
<GPIOMUX(5,
GPO_PWM_PAD_OUT_BIT1,
GPO_PWM_PAD_OE_N_BIT1,
GPI_NONE)>;
bias-disable;
drive-strength = <35>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
};
sdio0_pins: sdio0-0 {
clk-pins {
pinmux = <GPIOMUX(54, GPO_SDIO0_PAD_CCLK_OUT,
@ -257,6 +275,12 @@
clock-frequency = <27000000>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;
status = "okay";
};
&sdio0 {
broken-cd;
bus-width = <4>;

9
arch/riscv/boot/dts/starfive/jh7100.dtsi
View File

@ -320,6 +320,15 @@
<&rstgen JH7100_RSTN_WDT>;
};
pwm: pwm@12490000 {
compatible = "starfive,jh7100-pwm", "opencores,pwm-v1";
reg = <0x0 0x12490000 0x0 0x10000>;
clocks = <&clkgen JH7100_CLK_PWM_APB>;
resets = <&rstgen JH7100_RSTN_PWM_APB>;
#pwm-cells = <3>;
status = "disabled";
};
sfctemp: temperature-sensor@124a0000 {
compatible = "starfive,jh7100-temp";
reg = <0x0 0x124a0000 0x0 0x10000>;