drm/radeon: bind fan control on SI cards to hwmon interface
This adds a possibility to control fan on SI parts via exported hwmon variables. Note that automatic ucode fan management pauses if you choose to enable manual fan control. Use with caution! Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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36689e5750
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5e8150a687
@ -1953,6 +1953,10 @@ static struct radeon_asic si_asic = {
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.debugfs_print_current_performance_level = &si_dpm_debugfs_print_current_performance_level,
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.force_performance_level = &si_dpm_force_performance_level,
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.vblank_too_short = &ni_dpm_vblank_too_short,
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.fan_ctrl_set_mode = &si_fan_ctrl_set_mode,
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.fan_ctrl_get_mode = &si_fan_ctrl_get_mode,
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.get_fan_speed_percent = &si_fan_ctrl_get_fan_speed_percent,
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.set_fan_speed_percent = &si_fan_ctrl_set_fan_speed_percent,
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},
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.pflip = {
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.page_flip = &evergreen_page_flip,
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@ -744,6 +744,12 @@ void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
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struct seq_file *m);
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int si_dpm_force_performance_level(struct radeon_device *rdev,
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enum radeon_dpm_forced_level level);
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int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
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u32 *speed);
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int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
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u32 speed);
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u32 si_fan_ctrl_get_mode(struct radeon_device *rdev);
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void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode);
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/* DCE8 - CIK */
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void dce8_bandwidth_update(struct radeon_device *rdev);
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@ -1756,6 +1756,9 @@ static int si_calculate_sclk_params(struct radeon_device *rdev,
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u32 engine_clock,
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SISLANDS_SMC_SCLK_VALUE *sclk);
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static void si_thermal_start_smc_fan_control(struct radeon_device *rdev);
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static void si_fan_ctrl_set_default_mode(struct radeon_device *rdev);
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static struct si_power_info *si_get_pi(struct radeon_device *rdev)
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{
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struct si_power_info *pi = rdev->pm.dpm.priv;
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@ -6012,36 +6015,46 @@ static int si_thermal_setup_fan_table(struct radeon_device *rdev)
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static int si_fan_ctrl_start_smc_fan_control(struct radeon_device *rdev)
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{
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struct si_power_info *si_pi = si_get_pi(rdev);
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PPSMC_Result ret;
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ret = si_send_msg_to_smc(rdev, PPSMC_StartFanControl);
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if (ret == PPSMC_Result_OK)
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if (ret == PPSMC_Result_OK) {
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si_pi->fan_is_controlled_by_smc = true;
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return 0;
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else
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} else {
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return -EINVAL;
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}
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}
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static int si_fan_ctrl_stop_smc_fan_control(struct radeon_device *rdev)
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{
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struct si_power_info *si_pi = si_get_pi(rdev);
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PPSMC_Result ret;
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ret = si_send_msg_to_smc(rdev, PPSMC_StopFanControl);
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if (ret == PPSMC_Result_OK)
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if (ret == PPSMC_Result_OK) {
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si_pi->fan_is_controlled_by_smc = false;
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return 0;
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else
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} else {
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return -EINVAL;
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}
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}
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#if 0
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static int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
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u32 *speed)
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int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
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u32 *speed)
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{
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struct si_power_info *si_pi = si_get_pi(rdev);
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u32 duty, duty100;
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u64 tmp64;
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if (rdev->pm.no_fan)
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return -ENOENT;
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if (si_pi->fan_is_controlled_by_smc)
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return -EINVAL;
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duty100 = (RREG32(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;
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duty = (RREG32(CG_THERMAL_STATUS) & FDO_PWM_DUTY_MASK) >> FDO_PWM_DUTY_SHIFT;
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@ -6058,8 +6071,8 @@ static int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
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return 0;
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}
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static int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
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u32 speed)
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int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
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u32 speed)
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{
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u32 tmp;
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u32 duty, duty100;
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@ -6071,9 +6084,6 @@ static int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
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if (speed > 100)
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return -EINVAL;
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if (rdev->pm.dpm.fan.ucode_fan_control)
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si_fan_ctrl_stop_smc_fan_control(rdev);
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duty100 = (RREG32(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;
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if (duty100 == 0)
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@ -6087,11 +6097,38 @@ static int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
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tmp |= FDO_STATIC_DUTY(duty);
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WREG32(CG_FDO_CTRL0, tmp);
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si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC);
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return 0;
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}
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void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode)
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{
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if (mode) {
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/* stop auto-manage */
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if (rdev->pm.dpm.fan.ucode_fan_control)
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si_fan_ctrl_stop_smc_fan_control(rdev);
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si_fan_ctrl_set_static_mode(rdev, mode);
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} else {
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/* restart auto-manage */
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if (rdev->pm.dpm.fan.ucode_fan_control)
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si_thermal_start_smc_fan_control(rdev);
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else
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si_fan_ctrl_set_default_mode(rdev);
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}
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}
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u32 si_fan_ctrl_get_mode(struct radeon_device *rdev)
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{
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struct si_power_info *si_pi = si_get_pi(rdev);
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u32 tmp;
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if (si_pi->fan_is_controlled_by_smc)
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return 0;
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tmp = RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;
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return (tmp >> FDO_PWM_MODE_SHIFT);
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}
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#if 0
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static int si_fan_ctrl_get_fan_speed_rpm(struct radeon_device *rdev,
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u32 *speed)
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{
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@ -202,6 +202,7 @@ struct si_power_info {
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bool fan_ctrl_is_in_default_mode;
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u32 t_min;
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u32 fan_ctrl_default_mode;
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bool fan_is_controlled_by_smc;
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};
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#define SISLANDS_INITIAL_STATE_ARB_INDEX 0
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