media: dt-bindings: mediatek,vcodec: Remove VDEC_SYS register space
The binding expects the first register space to be VDEC_SYS. However this register space is already assigned to a different node on both MT8173 and MT8183: a clock-controller node called 'vdecsys' which is also a syscon. In order to resolve the overlapping address ranges, remove the VDEC_SYS register space from the video decoder, and add a new property to hold the phandle to the syscon, so that iospace can still be handled. Also add reg-names to be able to tell that this new register schema is used, so the driver can keep backward compatibility. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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@ -21,7 +21,22 @@ properties:
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- mediatek,mt8183-vcodec-dec
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reg:
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maxItems: 12
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minItems: 11
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maxItems: 11
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reg-names:
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items:
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- const: misc
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- const: ld
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- const: top
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- const: cm
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- const: ad
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- const: av
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- const: pp
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- const: hwd
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- const: hwq
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- const: hwb
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- const: hwg
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interrupts:
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maxItems: 1
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@ -60,6 +75,10 @@ properties:
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description:
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Describes point to scp.
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mediatek,vdecsys:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Phandle to the vdecsys syscon node.
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required:
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- compatible
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- reg
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@ -67,6 +86,7 @@ required:
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- clocks
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- clock-names
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- iommus
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- mediatek,vdecsys
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allOf:
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- if:
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@ -126,10 +146,9 @@ examples:
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/mt8173-power.h>
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vcodec_dec: vcodec@16000000 {
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vcodec_dec: vcodec@16020000 {
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compatible = "mediatek,mt8173-vcodec-dec";
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reg = <0x16000000 0x100>, /*VDEC_SYS*/
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<0x16020000 0x1000>, /*VDEC_MISC*/
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reg = <0x16020000 0x1000>, /*VDEC_MISC*/
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<0x16021000 0x800>, /*VDEC_LD*/
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<0x16021800 0x800>, /*VDEC_TOP*/
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<0x16022000 0x1000>, /*VDEC_CM*/
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@ -150,6 +169,7 @@ examples:
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<&iommu M4U_PORT_HW_VDEC_VLD_EXT>,
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<&iommu M4U_PORT_HW_VDEC_VLD2_EXT>;
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mediatek,vpu = <&vpu>;
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mediatek,vdecsys = <&vdecsys>;
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power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
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clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>,
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<&topckgen CLK_TOP_UNIVPLL_D2>,
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