arm64: dts: ti: k3-j721e-main: Fix "bus-range" upto 256 bus number for PCIe
commit4e5833884f
("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") restricted PCIe bus numbers from 0 to 15 (due to SMMU restriction in J721E). However since SMMU is not enabled, allow the full supported bus numbers from 0 to 255. Fixes:4e5833884f
("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210915055358.19997-3-kishon@ti.com
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@ -610,7 +610,7 @@
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clock-names = "fck";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0xf>;
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bus-range = <0x0 0xff>;
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vendor-id = <0x104c>;
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device-id = <0xb00d>;
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msi-map = <0x0 &gic_its 0x0 0x10000>;
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@ -658,7 +658,7 @@
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clock-names = "fck";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0xf>;
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bus-range = <0x0 0xff>;
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vendor-id = <0x104c>;
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device-id = <0xb00d>;
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msi-map = <0x0 &gic_its 0x10000 0x10000>;
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@ -706,7 +706,7 @@
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clock-names = "fck";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0xf>;
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bus-range = <0x0 0xff>;
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vendor-id = <0x104c>;
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device-id = <0xb00d>;
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msi-map = <0x0 &gic_its 0x20000 0x10000>;
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@ -754,7 +754,7 @@
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clock-names = "fck";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0xf>;
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bus-range = <0x0 0xff>;
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vendor-id = <0x104c>;
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device-id = <0xb00d>;
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msi-map = <0x0 &gic_its 0x30000 0x10000>;
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