diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi index 502faf6144b0..6de86a4f0ec4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi @@ -74,7 +74,7 @@ reg = <0x4b>; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; - interrupts = <3 GPIO_ACTIVE_LOW>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; regulators { @@ -292,7 +292,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 + MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi index f572b7d207f4..f305a530ff6f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -123,7 +123,7 @@ reg = <0x4b>; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; - interrupts = <3 GPIO_ACTIVE_LOW>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; #clock-cells = <0>; @@ -392,7 +392,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 + MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index 6f998d57aafa..5313dd7b8ded 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -129,7 +129,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_captouch>; interrupt-parent = <&gpio5>; - interrupts = <4 GPIO_ACTIVE_HIGH>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; touchscreen-size-x = <800>; touchscreen-size-y = <480>; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi index 9c6e91243ba0..4107fe914d08 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -137,7 +137,11 @@ reg = <0x4b>; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio2>; - interrupts = <8 GPIO_ACTIVE_LOW>; + /* + * The interrupt is not correct. It should be level low, + * however with internal pull up this causes IRQ storm. + */ + interrupts = <8 IRQ_TYPE_EDGE_RISING>; rohm,reset-snvs-powered; #clock-cells = <0>;