OpenRISC updates for 5.15
A few cleanups and compiler warning fixes for OpenRISC. Also, this includes dts and defconfig updates to enable Ethernet on OpenRISC/Litex FPGA SoC's now that the LiteEth driver has gone upstream. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmExPQ0ACgkQw7McLV5m J+Qj0Q//bW0kYR8b4TAYm9d1NY0LaUrx6eE0mOIYj5vLMUx4l3vVOiTwsi4UdcCO 7Pw1x/EyRwZV1pW7jw6w4C+TZS9nniMQeNeJKddFMhdMFotfL2AWvaIaC9VHvKL5 vusrT3LhF3z73R4QBmDUAE9QghUJlVXyBzGRNKKpuK3kX/1m0X3GLyRWCAjuBhia /yqeM8XUFDMUNEdu3Aoc9JckFc62Ri6BYPVk4ePqfTRSW8oTPXgIw2l39aw4sJPM fS6BAJvAUIcoXjGK5utzg02Iz5Nf+gT4jYJ/2ZS5MWmbCxy20RK9lFTD/wbHh6F0 34/xIRjDNWAfbC+w6smnZedheJHe3ca0/ss+JhQ4PRyTQGx4looiYayy5cYUcwqy uYTg/+rPJ7JIJBXYS28gFiOBlSGpdGpGUClD4WQc2zuFtmoYN7VNGHnwXuktSuVz U3h/g0GmGtiB/8SU/1Hh2F1Ga1U3g4C2ITcP5HUK1RPTzFxGYY/VlzutehUTmWmg qnWSE95Ci8PoBVzX44KPvh5HfL3TMtwp3r0zKTysDCfBg0dIH7LHHiadXlDpAMdB wdMrReUEetgQZnX8IJZUyWo0AzU/AUOHtjx3P8NW61ObGHCGd9yMQivUVijwtJxV a74yxdJh31vEbYbgPpURs88IByXteS/X7M1IqYcocOlpHjQMNIA= =md7e -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://github.com/openrisc/linux Pull OpenRISC updates from Stafford Horne: "A few cleanups and compiler warning fixes for OpenRISC. Also, this includes dts and defconfig updates to enable Ethernet on OpenRISC/Litex FPGA SoC's now that the LiteEth driver has gone upstream" * tag 'for-linus' of git://github.com/openrisc/linux: openrisc/litex: Update defconfig openrisc/litex: Add ethernet device openrisc/litex: Update uart address openrisc: Fix compiler warnings in setup openrisc: rename or32 code & comments to or1k openrisc: don't printk() unconditionally
This commit is contained in:
commit
603eefda5f
@ -41,10 +41,10 @@
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interrupt-controller;
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interrupt-controller;
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};
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};
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serial0: serial@e0002000 {
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serial0: serial@e0006800 {
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device_type = "serial";
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device_type = "serial";
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compatible = "litex,liteuart";
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compatible = "litex,liteuart";
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reg = <0xe0002000 0x100>;
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reg = <0xe0006800 0x100>;
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};
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};
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soc_ctrl0: soc_controller@e0000000 {
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soc_ctrl0: soc_controller@e0000000 {
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@ -52,4 +52,13 @@
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reg = <0xe0000000 0xc>;
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reg = <0xe0000000 0xc>;
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status = "okay";
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status = "okay";
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};
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};
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ethernet@e0001000 {
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compatible = "litex,liteeth";
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reg = <0xe0001000 0x7c>,
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<0xe0001800 0x0a>,
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<0x80000000 0x2000>;
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reg-names = "mac", "mdio", "buffer";
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interrupts = <2>;
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};
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};
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};
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@ -1,18 +1,24 @@
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
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CONFIG_BUG_ON_DATA_CORRUPTION=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_EMBEDDED=y
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CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"
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CONFIG_HZ_100=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_INET=y
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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CONFIG_DEVTMPFS_MOUNT=y
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CONFIG_EMBEDDED=y
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CONFIG_HZ_100=y
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CONFIG_INITRAMFS_SOURCE="openrisc-rootfs.cpio.gz"
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CONFIG_OF_OVERLAY=y
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CONFIG_OF_OVERLAY=y
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CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"
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CONFIG_NETDEVICES=y
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CONFIG_PANIC_ON_OOPS=y
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CONFIG_LITEX_LITEETH=y
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CONFIG_PRINTK_TIME=y
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CONFIG_LITEX_SOC_CONTROLLER=y
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CONFIG_SERIAL_LITEUART=y
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CONFIG_SERIAL_LITEUART=y
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CONFIG_SERIAL_LITEUART_CONSOLE=y
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CONFIG_SERIAL_LITEUART_CONSOLE=y
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CONFIG_SOFTLOCKUP_DETECTOR=y
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CONFIG_TTY_PRINTK=y
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CONFIG_TTY_PRINTK=y
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CONFIG_LITEX_SOC_CONTROLLER=y
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CONFIG_TMPFS=y
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CONFIG_PRINTK_TIME=y
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CONFIG_PANIC_ON_OOPS=y
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CONFIG_SOFTLOCKUP_DETECTOR=y
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CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
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CONFIG_BUG_ON_DATA_CORRUPTION=y
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@ -12,7 +12,7 @@
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* et al.
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* et al.
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*/
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*/
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/* or32 pgtable.h - macros and functions to manipulate page tables
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/* or1k pgtable.h - macros and functions to manipulate page tables
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*
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*
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* Based on:
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* Based on:
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* include/asm-cris/pgtable.h
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* include/asm-cris/pgtable.h
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@ -29,14 +29,14 @@
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/*
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/*
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* The Linux memory management assumes a three-level page table setup. On
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* The Linux memory management assumes a three-level page table setup. On
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* or32, we use that, but "fold" the mid level into the top-level page
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* or1k, we use that, but "fold" the mid level into the top-level page
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* table. Since the MMU TLB is software loaded through an interrupt, it
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* table. Since the MMU TLB is software loaded through an interrupt, it
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* supports any page table structure, so we could have used a three-level
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* supports any page table structure, so we could have used a three-level
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* setup, but for the amounts of memory we normally use, a two-level is
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* setup, but for the amounts of memory we normally use, a two-level is
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* probably more efficient.
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* probably more efficient.
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*
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*
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* This file contains the functions and defines necessary to modify and use
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* This file contains the functions and defines necessary to modify and use
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* the or32 page table tree.
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* the or1k page table tree.
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*/
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*/
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extern void paging_init(void);
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extern void paging_init(void);
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15
arch/openrisc/include/asm/setup.h
Normal file
15
arch/openrisc/include/asm/setup.h
Normal file
@ -0,0 +1,15 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2021 Stafford Horne
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*/
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#ifndef _ASM_OR1K_SETUP_H
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#define _ASM_OR1K_SETUP_H
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#include <linux/init.h>
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#include <asm-generic/setup.h>
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#ifndef __ASSEMBLY__
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void __init or1k_early_setup(void *fdt);
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#endif
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#endif /* _ASM_OR1K_SETUP_H */
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@ -25,7 +25,7 @@
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/* THREAD_SIZE is the size of the task_struct/kernel_stack combo.
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/* THREAD_SIZE is the size of the task_struct/kernel_stack combo.
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* normally, the stack is found by doing something like p + THREAD_SIZE
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* normally, the stack is found by doing something like p + THREAD_SIZE
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* in or32, a page is 8192 bytes, which seems like a sane size
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* in or1k, a page is 8192 bytes, which seems like a sane size
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*/
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*/
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#define THREAD_SIZE_ORDER 0
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#define THREAD_SIZE_ORDER 0
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@ -326,7 +326,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
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1: l.ori r6,r0,0x0 // !write access
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1: l.ori r6,r0,0x0 // !write access
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2:
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2:
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/* call fault.c handler in or32/mm/fault.c */
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/* call fault.c handler in openrisc/mm/fault.c */
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l.jal do_page_fault
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l.jal do_page_fault
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l.nop
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l.nop
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l.j _ret_from_exception
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l.j _ret_from_exception
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@ -348,7 +348,7 @@ EXCEPTION_ENTRY(_insn_page_fault_handler)
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/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
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/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
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l.ori r6,r0,0x0 // !write access
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l.ori r6,r0,0x0 // !write access
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/* call fault.c handler in or32/mm/fault.c */
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/* call fault.c handler in openrisc/mm/fault.c */
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l.jal do_page_fault
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l.jal do_page_fault
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l.nop
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l.nop
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l.j _ret_from_exception
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l.j _ret_from_exception
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@ -547,6 +547,7 @@ EXCEPTION_ENTRY(_external_irq_handler)
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l.bnf 1f // ext irq enabled, all ok.
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l.bnf 1f // ext irq enabled, all ok.
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l.nop
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l.nop
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#ifdef CONFIG_PRINTK
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l.addi r1,r1,-0x8
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l.addi r1,r1,-0x8
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l.movhi r3,hi(42f)
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l.movhi r3,hi(42f)
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l.ori r3,r3,lo(42f)
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l.ori r3,r3,lo(42f)
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@ -560,6 +561,7 @@ EXCEPTION_ENTRY(_external_irq_handler)
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.string "\n\rESR interrupt bug: in _external_irq_handler (ESR %x)\n\r"
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.string "\n\rESR interrupt bug: in _external_irq_handler (ESR %x)\n\r"
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.align 4
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.align 4
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.previous
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.previous
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#endif
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l.ori r4,r4,SPR_SR_IEE // fix the bug
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l.ori r4,r4,SPR_SR_IEE // fix the bug
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// l.sw PT_SR(r1),r4
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// l.sw PT_SR(r1),r4
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@ -599,7 +599,7 @@ flush_tlb:
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l.jal _flush_tlb
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l.jal _flush_tlb
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l.nop
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l.nop
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/* The MMU needs to be enabled before or32_early_setup is called */
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/* The MMU needs to be enabled before or1k_early_setup is called */
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enable_mmu:
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enable_mmu:
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/*
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/*
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@ -641,9 +641,9 @@ enable_mmu:
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/* magic number mismatch, set fdt pointer to null */
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/* magic number mismatch, set fdt pointer to null */
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l.or r25,r0,r0
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l.or r25,r0,r0
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_fdt_found:
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_fdt_found:
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/* pass fdt pointer to or32_early_setup in r3 */
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/* pass fdt pointer to or1k_early_setup in r3 */
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l.or r3,r0,r25
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l.or r3,r0,r25
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LOAD_SYMBOL_2_GPR(r24, or32_early_setup)
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LOAD_SYMBOL_2_GPR(r24, or1k_early_setup)
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l.jalr r24
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l.jalr r24
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l.nop
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l.nop
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@ -209,7 +209,8 @@ void __init setup_cpuinfo(void)
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}
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}
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/**
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/**
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* or32_early_setup
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* or1k_early_setup
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* @fdt: pointer to the start of the device tree in memory or NULL
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*
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*
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* Handles the pointer to the device tree that this kernel is to use
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* Handles the pointer to the device tree that this kernel is to use
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* for establishing the available platform devices.
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* for establishing the available platform devices.
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@ -217,7 +218,7 @@ void __init setup_cpuinfo(void)
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* Falls back on built-in device tree in case null pointer is passed.
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* Falls back on built-in device tree in case null pointer is passed.
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*/
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*/
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void __init or32_early_setup(void *fdt)
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void __init or1k_early_setup(void *fdt)
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{
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{
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if (fdt)
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if (fdt)
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pr_info("FDT at %p\n", fdt);
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pr_info("FDT at %p\n", fdt);
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@ -243,21 +244,6 @@ static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
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return mask & reg;
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return mask & reg;
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}
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}
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void __init detect_unit_config(unsigned long upr, unsigned long mask,
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char *text, void (*func) (void))
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{
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if (text != NULL)
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printk("%s", text);
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if (upr & mask) {
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if (func != NULL)
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func();
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else
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printk("present\n");
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} else
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printk("not present\n");
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}
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/*
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/*
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* calibrate_delay
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* calibrate_delay
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*
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*
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@ -1,6 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0-only
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# SPDX-License-Identifier: GPL-2.0-only
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#
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#
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# Makefile for or32 specific library files..
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# Makefile for or1k specific library files..
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#
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#
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obj-y := delay.o string.o memset.o memcpy.o
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obj-y := delay.o string.o memset.o memcpy.o
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@ -28,7 +28,7 @@ unsigned long pte_misses; /* updated by do_page_fault() */
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unsigned long pte_errors; /* updated by do_page_fault() */
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unsigned long pte_errors; /* updated by do_page_fault() */
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/* __PHX__ :: - check the vmalloc_fault in do_page_fault()
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/* __PHX__ :: - check the vmalloc_fault in do_page_fault()
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* - also look into include/asm-or32/mmu_context.h
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* - also look into include/asm/mmu_context.h
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*/
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*/
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volatile pgd_t *current_pgd[NR_CPUS];
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volatile pgd_t *current_pgd[NR_CPUS];
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