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Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git

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This commit is contained in:
Steve French 2005-11-29 20:56:07 -08:00
commit 606c0dafbe
162 changed files with 1721 additions and 2049 deletions
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2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 15
EXTRAVERSION =-rc2
EXTRAVERSION =-rc3
NAME=Affluent Albatross
# *DOCUMENTATION*

85
arch/arm/configs/corgi_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.14-rc3
# Sun Oct 9 15:46:42 2005
# Linux kernel version: 2.6.15-rc2
# Mon Nov 28 10:30:09 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@ -63,6 +63,23 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
#
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# System Type
#
@ -85,6 +102,7 @@ CONFIG_ARCH_PXA=y
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
@ -98,12 +116,14 @@ CONFIG_ARCH_PXA=y
CONFIG_PXA_SHARPSL=y
CONFIG_PXA_SHARPSL_25x=y
# CONFIG_PXA_SHARPSL_27x is not set
# CONFIG_MACH_POODLE is not set
CONFIG_MACH_POODLE=y
CONFIG_MACH_CORGI=y
CONFIG_MACH_SHEPHERD=y
CONFIG_MACH_HUSKY=y
CONFIG_MACH_TOSA=y
CONFIG_PXA25x=y
CONFIG_PXA_SHARP_C7xx=y
CONFIG_PXA_SSP=y
#
# Processor Type
@ -155,6 +175,7 @@ CONFIG_FLATMEM_MANUAL=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
CONFIG_ALIGNMENT_TRAP=y
#
@ -235,6 +256,10 @@ CONFIG_INET6_TUNNEL=m
CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
#
# Core Netfilter Configuration
#
# CONFIG_NETFILTER_NETLINK is not set
#
@ -356,6 +381,10 @@ CONFIG_IP6_NF_RAW=m
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
CONFIG_NET_CLS_ROUTE=y
@ -413,6 +442,7 @@ CONFIG_IRCOMM=m
# CONFIG_SMC_IRCC_FIR is not set
# CONFIG_ALI_FIR is not set
# CONFIG_VIA_FIR is not set
CONFIG_PXA_FICP=m
CONFIG_BT=m
CONFIG_BT_L2CAP=m
CONFIG_BT_SCO=m
@ -431,7 +461,6 @@ CONFIG_BT_HCIUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIUART_BCSP_TXCRC=y
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
@ -458,6 +487,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_DEBUG_DRIVER is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
@ -477,6 +511,7 @@ CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
#
# RAM/ROM/Flash chip drivers
@ -531,6 +566,11 @@ CONFIG_MTD_NAND_IDS=y
CONFIG_MTD_NAND_SHARPSL=y
# CONFIG_MTD_NAND_NANDSIM is not set
#
# OneNAND Flash Device Drivers
#
# CONFIG_MTD_ONENAND is not set
#
# Parallel port support
#
@ -551,14 +591,6 @@ CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_RAM is not set
CONFIG_BLK_DEV_RAM_COUNT=16
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_ATA_OVER_ETH is not set
#
@ -625,6 +657,7 @@ CONFIG_SCSI_MULTI_LUN=y
#
# SCSI low-level drivers
#
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_DEBUG is not set
@ -748,6 +781,7 @@ CONFIG_PPP_ASYNC=m
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_PPP_DEFLATE is not set
CONFIG_PPP_BSDCOMP=m
# CONFIG_PPP_MPPE is not set
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
@ -850,11 +884,15 @@ CONFIG_UNIX98_PTYS=y
# PCMCIA character devices
#
# CONFIG_SYNCLINK_CS is not set
# CONFIG_CARDMAN_4000 is not set
# CONFIG_CARDMAN_4040 is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set
#
# I2C support
@ -889,6 +927,7 @@ CONFIG_I2C_PXA=y
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_RTC8564 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_RTC_X1205_I2C is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
@ -957,7 +996,10 @@ CONFIG_VIDEO_DEV=m
# CONFIG_VIDEO_SAA5246A is not set
# CONFIG_VIDEO_SAA5249 is not set
# CONFIG_TUNER_3036 is not set
# CONFIG_VIDEO_EM28XX is not set
# CONFIG_VIDEO_OVCAMCHIP is not set
# CONFIG_VIDEO_AUDIO_DECODER is not set
# CONFIG_VIDEO_DECODER is not set
#
# Radio Adapters
@ -976,13 +1018,12 @@ CONFIG_FB=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_SOFT_CURSOR=y
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_PXA is not set
CONFIG_FB_W100=y
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
#
@ -991,6 +1032,7 @@ CONFIG_FB_W100=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
@ -1087,15 +1129,15 @@ CONFIG_USB_SL811_CS=m
# USB Device Class drivers
#
# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set
#
# USB Bluetooth TTY can only be used with disabled Bluetooth subsystem
#
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# may also be needed; see USB_STORAGE Help for more information
#
CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set
@ -1107,7 +1149,6 @@ CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
#
# USB Input Devices
@ -1185,6 +1226,7 @@ CONFIG_USB_MON=y
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_GENERIC=y
# CONFIG_USB_SERIAL_AIRPRIME is not set
# CONFIG_USB_SERIAL_ANYDATA is not set
CONFIG_USB_SERIAL_BELKIN=m
# CONFIG_USB_SERIAL_WHITEHEAT is not set
CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
@ -1340,6 +1382,7 @@ CONFIG_RAMFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
CONFIG_JFFS2_SUMMARY=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
@ -1466,7 +1509,9 @@ CONFIG_DETECT_SOFTLOCKUP=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_DEBUG_VM is not set
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y

1015
arch/arm/configs/poodle_defconfig
View File

File diff suppressed because it is too large Load Diff

85
arch/arm/configs/spitz_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.14-rc3
# Sun Oct 9 17:11:19 2005
# Linux kernel version: 2.6.15-rc2
# Mon Nov 28 10:26:52 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@ -63,6 +63,23 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
#
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# System Type
#
@ -85,6 +102,7 @@ CONFIG_ARCH_PXA=y
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
@ -98,10 +116,13 @@ CONFIG_ARCH_PXA=y
CONFIG_PXA_SHARPSL=y
# CONFIG_PXA_SHARPSL_25x is not set
CONFIG_PXA_SHARPSL_27x=y
CONFIG_MACH_AKITA=y
CONFIG_MACH_SPITZ=y
CONFIG_MACH_BORZOI=y
CONFIG_PXA27x=y
CONFIG_IWMMXT=y
CONFIG_PXA_SHARP_Cxx00=y
CONFIG_PXA_SSP=y
#
# Processor Type
@ -153,6 +174,7 @@ CONFIG_FLATMEM_MANUAL=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
CONFIG_ALIGNMENT_TRAP=y
#
@ -233,6 +255,10 @@ CONFIG_INET6_TUNNEL=m
CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
#
# Core Netfilter Configuration
#
# CONFIG_NETFILTER_NETLINK is not set
#
@ -354,6 +380,10 @@ CONFIG_IP6_NF_RAW=m
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
CONFIG_NET_CLS_ROUTE=y
@ -411,6 +441,7 @@ CONFIG_IRCOMM=m
# CONFIG_SMC_IRCC_FIR is not set
# CONFIG_ALI_FIR is not set
# CONFIG_VIA_FIR is not set
CONFIG_PXA_FICP=m
CONFIG_BT=m
CONFIG_BT_L2CAP=m
CONFIG_BT_SCO=m
@ -429,7 +460,6 @@ CONFIG_BT_HCIUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIUART_BCSP_TXCRC=y
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
@ -456,6 +486,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_DEBUG_DRIVER is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
@ -475,6 +510,7 @@ CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
#
# RAM/ROM/Flash chip drivers
@ -529,6 +565,11 @@ CONFIG_MTD_NAND_IDS=y
CONFIG_MTD_NAND_SHARPSL=y
# CONFIG_MTD_NAND_NANDSIM is not set
#
# OneNAND Flash Device Drivers
#
# CONFIG_MTD_ONENAND is not set
#
# Parallel port support
#
@ -549,14 +590,6 @@ CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_RAM is not set
CONFIG_BLK_DEV_RAM_COUNT=16
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_ATA_OVER_ETH is not set
#
@ -623,6 +656,7 @@ CONFIG_SCSI_MULTI_LUN=y
#
# SCSI low-level drivers
#
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_DEBUG is not set
@ -746,6 +780,7 @@ CONFIG_PPP_ASYNC=m
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_PPP_DEFLATE is not set
CONFIG_PPP_BSDCOMP=m
# CONFIG_PPP_MPPE is not set
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
@ -771,6 +806,7 @@ CONFIG_INPUT=y
# CONFIG_INPUT_TSDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
# CONFIG_INPUT_POWER is not set
#
# Input Device Drivers
@ -848,11 +884,15 @@ CONFIG_UNIX98_PTYS=y
# PCMCIA character devices
#
# CONFIG_SYNCLINK_CS is not set
# CONFIG_CARDMAN_4000 is not set
# CONFIG_CARDMAN_4040 is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set
#
# I2C support
@ -891,14 +931,13 @@ CONFIG_FB=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_SOFT_CURSOR=y
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
CONFIG_FB_PXA=y
# CONFIG_FB_W100 is not set
# CONFIG_FB_PXA_PARAMETERS is not set
# CONFIG_FB_S1D13XXX is not set
CONFIG_FB_PXA=y
# CONFIG_FB_PXA_PARAMETERS is not set
# CONFIG_FB_W100 is not set
# CONFIG_FB_VIRTUAL is not set
#
@ -907,6 +946,7 @@ CONFIG_FB_PXA=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
@ -965,15 +1005,15 @@ CONFIG_USB_SL811_CS=m
#
# USB Device Class drivers
#
#
# USB Bluetooth TTY can only be used with disabled Bluetooth subsystem
#
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# may also be needed; see USB_STORAGE Help for more information
#
CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set
@ -985,7 +1025,6 @@ CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
#
# USB Input Devices
@ -1058,6 +1097,7 @@ CONFIG_USB_MON=y
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_GENERIC=y
# CONFIG_USB_SERIAL_AIRPRIME is not set
# CONFIG_USB_SERIAL_ANYDATA is not set
CONFIG_USB_SERIAL_BELKIN=m
# CONFIG_USB_SERIAL_WHITEHEAT is not set
CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
@ -1218,6 +1258,7 @@ CONFIG_RAMFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
CONFIG_JFFS2_SUMMARY=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
@ -1344,7 +1385,9 @@ CONFIG_DETECT_SOFTLOCKUP=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_DEBUG_VM is not set
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y

11
arch/arm/kernel/head.S
View File

@ -17,7 +17,6 @@
#include <asm/assembler.h>
#include <asm/domain.h>
#include <asm/mach-types.h>
#include <asm/procinfo.h>
#include <asm/ptrace.h>
#include <asm/asm-offsets.h>
@ -83,7 +82,7 @@ ENTRY(stext)
@ and irqs disabled
bl __lookup_processor_type @ r5=procinfo r9=cpuid
movs r10, r5 @ invalid processor (r5=0)?
beq __error_p @ yes, error 'p'
beq __error_p @ yes, error 'p'
bl __lookup_machine_type @ r5=machinfo
movs r8, r5 @ invalid machine (r5=0)?
beq __error_a @ yes, error 'a'
@ -343,16 +342,12 @@ __create_page_tables:
bne 1b
#if defined(CONFIG_ARCH_NETWINDER) || defined(CONFIG_ARCH_CATS)
/*
* If we're using the NetWinder, we need to map in
* the 16550-type serial port for the debug messages
* If we're using the NetWinder or CATS, we also need to map
* in the 16550-type serial port for the debug messages
*/
teq r1, #MACH_TYPE_NETWINDER
teqne r1, #MACH_TYPE_CATS
bne 1f
add r0, r4, #0xff000000 >> 18
orr r3, r7, #0x7c000000
str r3, [r0]
1:
#endif
#ifdef CONFIG_ARCH_RPC
/*

4
arch/arm/mach-pxa/Kconfig
View File

@ -44,6 +44,7 @@ config PXA_SHARPSL_25x
config PXA_SHARPSL_27x
bool "Sharp PXA270 models (SL-Cxx00)"
select PXA27x
select IWMMXT
endchoice
@ -60,7 +61,6 @@ config MACH_CORGI
bool "Enable Sharp SL-C700 (Corgi) Support"
depends PXA_SHARPSL_25x
select PXA_SHARP_C7xx
select PXA_SSP
config MACH_SHEPHERD
bool "Enable Sharp SL-C750 (Shepherd) Support"
@ -90,7 +90,7 @@ config MACH_BORZOI
config MACH_TOSA
bool "Enable Sharp SL-6000x (Tosa) Support"
depends PXA_SHARPSL
depends PXA_SHARPSL_25x
config PXA25x
bool

1
arch/arm/mach-realview/core.c
View File

@ -30,7 +30,6 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/hardware/amba.h>
#include <asm/hardware/amba_clcd.h>
#include <asm/hardware/arm_timer.h>

13
arch/arm/mm/consistent.c
View File

@ -66,6 +66,7 @@ struct vm_region {
unsigned long vm_start;
unsigned long vm_end;
struct page *vm_pages;
int vm_active;
};
static struct vm_region consistent_head = {
@ -104,6 +105,7 @@ vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp)
list_add_tail(&new->vm_list, &c->vm_list);
new->vm_start = addr;
new->vm_end = addr + size;
new->vm_active = 1;
spin_unlock_irqrestore(&consistent_lock, flags);
return new;
@ -120,7 +122,7 @@ static struct vm_region *vm_region_find(struct vm_region *head, unsigned long ad
struct vm_region *c;
list_for_each_entry(c, &head->vm_list, vm_list) {
if (c->vm_start == addr)
if (c->vm_active && c->vm_start == addr)
goto out;
}
c = NULL;
@ -319,6 +321,7 @@ EXPORT_SYMBOL(dma_mmap_writecombine);
/*
* free a page as defined by the above mapping.
* Must not be called with IRQs disabled.
*/
void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
{
@ -326,14 +329,18 @@ void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr
unsigned long flags, addr;
pte_t *ptep;
WARN_ON(irqs_disabled());
size = PAGE_ALIGN(size);
spin_lock_irqsave(&consistent_lock, flags);
c = vm_region_find(&consistent_head, (unsigned long)cpu_addr);
if (!c)
goto no_area;
c->vm_active = 0;
spin_unlock_irqrestore(&consistent_lock, flags);
if ((c->vm_end - c->vm_start) != size) {
printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
__func__, c->vm_end - c->vm_start, size);
@ -372,8 +379,8 @@ void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr
flush_tlb_kernel_range(c->vm_start, c->vm_end);
spin_lock_irqsave(&consistent_lock, flags);
list_del(&c->vm_list);
spin_unlock_irqrestore(&consistent_lock, flags);
kfree(c);

14
arch/arm/tools/mach-types
View File

@ -12,7 +12,7 @@
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
# Last update: Fri Nov 11 21:55:04 2005
# Last update: Fri Nov 25 14:43:04 2005
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
@ -857,12 +857,12 @@ osiris MACH_OSIRIS OSIRIS 842
maestro MACH_MAESTRO MAESTRO 843
tunge2 MACH_TUNGE2 TUNGE2 844
ixbbm MACH_IXBBM IXBBM 845
mx27 MACH_MX27 MX27 846
mx27ads MACH_MX27 MX27 846
ax8004 MACH_AX8004 AX8004 847
at91sam9261ek MACH_AT91SAM9261EK AT91SAM9261EK 848
loft MACH_LOFT LOFT 849
magpie MACH_MAGPIE MAGPIE 850
mx21 MACH_MX21 MX21 851
mx21ads MACH_MX21 MX21 851
mb87m3400 MACH_MB87M3400 MB87M3400 852
mguard_delta MACH_MGUARD_DELTA MGUARD_DELTA 853
davinci_dvdp MACH_DAVINCI_DVDP DAVINCI_DVDP 854
@ -897,10 +897,16 @@ omi_board MACH_OMI_BOARD OMI_BOARD 882
mx21civ MACH_MX21CIV MX21CIV 883
mahi_cdac MACH_MAHI_CDAC MAHI_CDAC 884
xscale_palmtx MACH_XSCALE_PALMTX XSCALE_PALMTX 885
arch_s3c2413 MACH_ARCH_S3C2413 ARCH_S3C2413 886
s3c2413 MACH_S3C2413 S3C2413 887
samsys_ep0 MACH_SAMSYS_EP0 SAMSYS_EP0 888
wg302v1 MACH_WG302V1 WG302V1 889
wg302v2 MACH_WG302V2 WG302V2 890
eb42x MACH_EB42X EB42X 891
iq331es MACH_IQ331ES IQ331ES 892
cosydsp MACH_COSYDSP COSYDSP 893
uplat7d MACH_UPLAT7D UPLAT7D 894
ptdavinci MACH_PTDAVINCI PTDAVINCI 895
mbus MACH_MBUS MBUS 896
nadia2vb MACH_NADIA2VB NADIA2VB 897
r1000 MACH_R1000 R1000 898
hw90250 MACH_HW90250 HW90250 899

2
arch/frv/kernel/semaphore.c
View File

@ -20,7 +20,7 @@ struct sem_waiter {
struct task_struct *task;
};
#if SEM_DEBUG
#if SEMAPHORE_DEBUG
void semtrace(struct semaphore *sem, const char *str)
{
if (sem->debug)

2
arch/frv/mb93090-mb00/pci-irq.c
View File

@ -60,7 +60,7 @@ void __init pcibios_fixup_irqs(void)
}
}
void __init pcibios_penalize_isa_irq(int irq, int active)
void __init pcibios_penalize_isa_irq(int irq)
{
}

2
arch/frv/mm/init.c
View File

@ -108,7 +108,7 @@ void __init paging_init(void)
memset((void *) empty_zero_page, 0, PAGE_SIZE);
#if CONFIG_HIGHMEM
#ifdef CONFIG_HIGHMEM
if (num_physpages - num_mappedpages) {
pgd_t *pge;
pud_t *pue;

6
arch/frv/mm/pgalloc.c
View File

@ -85,7 +85,7 @@ static inline void pgd_list_add(pgd_t *pgd)
struct page *page = virt_to_page(pgd);
page->index = (unsigned long) pgd_list;
if (pgd_list)
pgd_list->private = (unsigned long) &page->index;
set_page_private(pgd_list, (unsigned long) &page->index);
pgd_list = page;
set_page_private(page, (unsigned long)&pgd_list);
}
@ -94,10 +94,10 @@ static inline void pgd_list_del(pgd_t *pgd)
{
struct page *next, **pprev, *page = virt_to_page(pgd);
next = (struct page *) page->index;
pprev = (struct page **)page_private(page);
pprev = (struct page **) page_private(page);
*pprev = next;
if (next)
next->private = (unsigned long) pprev;
set_page_private(next, (unsigned long) pprev);
}
void pgd_ctor(void *pgd, kmem_cache_t *cache, unsigned long unused)

4
arch/i386/kernel/io_apic.c
View File

@ -2009,7 +2009,7 @@ static void ack_edge_ioapic_vector(unsigned int vector)
{
int irq = vector_to_irq(vector);
move_irq(vector);
move_native_irq(vector);
ack_edge_ioapic_irq(irq);
}
@ -2024,7 +2024,7 @@ static void end_level_ioapic_vector (unsigned int vector)
{
int irq = vector_to_irq(vector);
move_irq(vector);
move_native_irq(vector);
end_level_ioapic_irq(irq);
}

8
arch/i386/kernel/reboot.c
View File

@ -111,6 +111,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
},
},
{ /* Handle problems with rebooting on HP nc6120 */
.callback = set_bios_reboot,
.ident = "HP Compaq nc6120",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nc6120"),
},
},
{ }
};

1
arch/ia64/kernel/ia64_ksyms.c
View File

@ -42,6 +42,7 @@ EXPORT_SYMBOL(clear_page);
#ifdef CONFIG_VIRTUAL_MEM_MAP
#include <linux/bootmem.h>
EXPORT_SYMBOL(min_low_pfn); /* defined by bootmem.c, but not exported by generic code */
EXPORT_SYMBOL(max_low_pfn); /* defined by bootmem.c, but not exported by generic code */
#endif

2
arch/ia64/kernel/kprobes.c
View File

@ -740,7 +740,7 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
switch(val) {
case DIE_BREAK:
/* err is break number from ia64_bad_break() */
if (args->err == 0x80200 || args->err == 0x80300)
if (args->err == 0x80200 || args->err == 0x80300 || args->err == 0)
if (pre_kprobes_handler(args))
ret = NOTIFY_STOP;
break;

18
arch/ia64/kernel/traps.c
View File

@ -132,24 +132,6 @@ __kprobes ia64_bad_break (unsigned long break_num, struct pt_regs *regs)
siginfo_t siginfo;
int sig, code;
/* break.b always sets cr.iim to 0, which causes problems for
* debuggers. Get the real break number from the original instruction,
* but only for kernel code. User space break.b is left alone, to
* preserve the existing behaviour. All break codings have the same
* format, so there is no need to check the slot type.
*/
if (break_num == 0 && !user_mode(regs)) {
struct ia64_psr *ipsr = ia64_psr(regs);
unsigned long *bundle = (unsigned long *)regs->cr_iip;
unsigned long slot;
switch (ipsr->ri) {
case 0: slot = (bundle[0] >> 5); break;
case 1: slot = (bundle[0] >> 46) | (bundle[1] << 18); break;
default: slot = (bundle[1] >> 23); break;
}
break_num = ((slot >> 36 & 1) << 20) | (slot >> 6 & 0xfffff);
}
/* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */
siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
siginfo.si_imm = break_num;

54
arch/m32r/kernel/io_mappi3.c
View File

@ -36,12 +36,13 @@ static inline void *_port2addr(unsigned long port)
return (void *)(port + NONCACHE_OFFSET);
}
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
#if defined(CONFIG_IDE)
static inline void *__port2addr_ata(unsigned long port)
{
static int dummy_reg;
switch (port) {
/* IDE0 CF */
case 0x1f0: return (void *)0xb4002000;
case 0x1f1: return (void *)0xb4012800;
case 0x1f2: return (void *)0xb4012002;
@ -51,6 +52,17 @@ static inline void *__port2addr_ata(unsigned long port)
case 0x1f6: return (void *)0xb4012006;
case 0x1f7: return (void *)0xb4012806;
case 0x3f6: return (void *)0xb401200e;
/* IDE1 IDE */
case 0x170: return (void *)0xb4810000; /* Data 16bit */
case 0x171: return (void *)0xb4810002; /* Features / Error */
case 0x172: return (void *)0xb4810004; /* Sector count */
case 0x173: return (void *)0xb4810006; /* Sector number */
case 0x174: return (void *)0xb4810008; /* Cylinder low */
case 0x175: return (void *)0xb481000a; /* Cylinder high */
case 0x176: return (void *)0xb481000c; /* Device head */
case 0x177: return (void *)0xb481000e; /* Command */
case 0x376: return (void *)0xb480800c; /* Device control / Alt status */
default: return (void *)&dummy_reg;
}
}
@ -108,8 +120,9 @@ unsigned char _inb(unsigned long port)
{
if (port >= LAN_IOSTART && port < LAN_IOEND)
return _ne_inb(PORT2ADDR_NE(port));
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
#if defined(CONFIG_IDE)
else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
return *(volatile unsigned char *)__port2addr_ata(port);
}
#endif
@ -127,8 +140,9 @@ unsigned short _inw(unsigned long port)
{
if (port >= LAN_IOSTART && port < LAN_IOEND)
return _ne_inw(PORT2ADDR_NE(port));
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
#if defined(CONFIG_IDE)
else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
return *(volatile unsigned short *)__port2addr_ata(port);
}
#endif
@ -185,8 +199,9 @@ void _outb(unsigned char b, unsigned long port)
if (port >= LAN_IOSTART && port < LAN_IOEND)
_ne_outb(b, PORT2ADDR_NE(port));
else
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
#if defined(CONFIG_IDE)
if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
*(volatile unsigned char *)__port2addr_ata(port) = b;
} else
#endif
@ -203,8 +218,9 @@ void _outw(unsigned short w, unsigned long port)
if (port >= LAN_IOSTART && port < LAN_IOEND)
_ne_outw(w, PORT2ADDR_NE(port));
else
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
#if defined(CONFIG_IDE)
if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
*(volatile unsigned short *)__port2addr_ata(port) = w;
} else
#endif
@ -253,8 +269,9 @@ void _insb(unsigned int port, void * addr, unsigned long count)
{
if (port >= LAN_IOSTART && port < LAN_IOEND)
_ne_insb(PORT2ADDR_NE(port), addr, count);
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
#if defined(CONFIG_IDE)
else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
unsigned char *buf = addr;
unsigned char *portp = __port2addr_ata(port);
while (count--)
@ -289,8 +306,9 @@ void _insw(unsigned int port, void * addr, unsigned long count)
pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
count, 1);
#endif
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
#if defined(CONFIG_IDE)
} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
portp = __port2addr_ata(port);
while (count--)
*buf++ = *(volatile unsigned short *)portp;
@ -321,8 +339,9 @@ void _outsb(unsigned int port, const void * addr, unsigned long count)
portp = PORT2ADDR_NE(port);
while (count--)
_ne_outb(*buf++, portp);
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
#if defined(CONFIG_IDE)
} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
portp = __port2addr_ata(port);
while (count--)
*(volatile unsigned char *)portp = *buf++;
@ -348,8 +367,9 @@ void _outsw(unsigned int port, const void * addr, unsigned long count)
portp = PORT2ADDR_NE(port);
while (count--)
*(volatile unsigned short *)portp = *buf++;
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
#if defined(CONFIG_IDE)
} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
portp = __port2addr_ata(port);
while (count--)
*(volatile unsigned short *)portp = *buf++;

20
arch/m32r/kernel/setup_mappi3.c
View File

@ -151,7 +151,7 @@ void __init init_IRQ(void)
disable_mappi3_irq(M32R_IRQ_INT1);
#endif /* CONFIG_USB */
/* ICUCR40: CFC IREQ */
/* CFC IREQ */
irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type;
irq_desc[PLD_IRQ_CFIREQ].action = 0;
@ -160,7 +160,7 @@ void __init init_IRQ(void)
disable_mappi3_irq(PLD_IRQ_CFIREQ);
#if defined(CONFIG_M32R_CFC)
/* ICUCR41: CFC Insert */
/* ICUCR41: CFC Insert & eject */
irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type;
irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
@ -168,14 +168,16 @@ void __init init_IRQ(void)
icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
/* ICUCR42: CFC Eject */
irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi3_irq_type;
irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_mappi3_irq(PLD_IRQ_CFC_EJECT);
#endif /* CONFIG_M32R_CFC */
/* IDE IREQ */
irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
irq_desc[PLD_IRQ_IDEIREQ].handler = &mappi3_irq_type;
irq_desc[PLD_IRQ_IDEIREQ].action = 0;
irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_mappi3_irq(PLD_IRQ_IDEIREQ);
}
#if defined(CONFIG_SMC91X)

6
arch/m32r/kernel/sys_m32r.c
View File

@ -41,7 +41,8 @@ asmlinkage int sys_tas(int *addr)
return -EFAULT;
local_irq_save(flags);
oldval = *addr;
*addr = 1;
if (!oldval)
*addr = 1;
local_irq_restore(flags);
return oldval;
}
@ -59,7 +60,8 @@ asmlinkage int sys_tas(int *addr)
_raw_spin_lock(&tas_lock);
oldval = *addr;
*addr = 1;
if (!oldval)
*addr = 1;
_raw_spin_unlock(&tas_lock);
return oldval;

6
arch/powerpc/kernel/ppc_ksyms.c
View File

@ -163,15 +163,13 @@ EXPORT_SYMBOL(giveup_altivec);
EXPORT_SYMBOL(giveup_spe);
#endif /* CONFIG_SPE */
#ifdef CONFIG_PPC64
EXPORT_SYMBOL(__flush_icache_range);
#else
#ifndef CONFIG_PPC64
EXPORT_SYMBOL(flush_instruction_cache);
EXPORT_SYMBOL(flush_icache_range);
EXPORT_SYMBOL(flush_tlb_kernel_range);
EXPORT_SYMBOL(flush_tlb_page);
EXPORT_SYMBOL(_tlbie);
#endif
EXPORT_SYMBOL(__flush_icache_range);
EXPORT_SYMBOL(flush_dcache_range);
#ifdef CONFIG_SMP

62
arch/powerpc/kernel/process.c
View File

@ -201,6 +201,28 @@ int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
}
#endif /* CONFIG_SPE */
/*
* If we are doing lazy switching of CPU state (FP, altivec or SPE),
* and the current task has some state, discard it.
*/
static inline void discard_lazy_cpu_state(void)
{
#ifndef CONFIG_SMP
preempt_disable();
if (last_task_used_math == current)
last_task_used_math = NULL;
#ifdef CONFIG_ALTIVEC
if (last_task_used_altivec == current)
last_task_used_altivec = NULL;
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
if (last_task_used_spe == current)
last_task_used_spe = NULL;
#endif
preempt_enable();
#endif /* CONFIG_SMP */
}
int set_dabr(unsigned long dabr)
{
if (ppc_md.set_dabr)
@ -434,19 +456,7 @@ void show_regs(struct pt_regs * regs)
void exit_thread(void)
{
kprobe_flush_task(current);
#ifndef CONFIG_SMP
if (last_task_used_math == current)
last_task_used_math = NULL;
#ifdef CONFIG_ALTIVEC
if (last_task_used_altivec == current)
last_task_used_altivec = NULL;
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
if (last_task_used_spe == current)
last_task_used_spe = NULL;
#endif
#endif /* CONFIG_SMP */
discard_lazy_cpu_state();
}
void flush_thread(void)
@ -458,18 +468,7 @@ void flush_thread(void)
t->flags ^= (_TIF_ABI_PENDING | _TIF_32BIT);
#endif
#ifndef CONFIG_SMP
if (last_task_used_math == current)
last_task_used_math = NULL;
#ifdef CONFIG_ALTIVEC
if (last_task_used_altivec == current)
last_task_used_altivec = NULL;
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
if (last_task_used_spe == current)
last_task_used_spe = NULL;
#endif
#endif /* CONFIG_SMP */
discard_lazy_cpu_state();
#ifdef CONFIG_PPC64 /* for now */
if (current->thread.dabr) {
@ -635,18 +634,7 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
}
#endif
#ifndef CONFIG_SMP
if (last_task_used_math == current)
last_task_used_math = NULL;
#ifdef CONFIG_ALTIVEC
if (last_task_used_altivec == current)
last_task_used_altivec = NULL;
#endif
#ifdef CONFIG_SPE
if (last_task_used_spe == current)
last_task_used_spe = NULL;
#endif
#endif /* CONFIG_SMP */
discard_lazy_cpu_state();
memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
current->thread.fpscr.val = 0;
#ifdef CONFIG_ALTIVEC

2
arch/powerpc/kernel/prom_init.c
View File

@ -265,7 +265,7 @@ static int __init call_prom_ret(const char *service, int nargs, int nret,
va_end(list);
for (i = 0; i < nret; i++)
rets[nargs+i] = 0;
args.args[nargs+i] = 0;
if (enter_prom(&args, RELOC(prom_entry)) < 0)
return PROM_ERROR;

6
arch/powerpc/kernel/vdso.c
View File

@ -145,8 +145,7 @@ static void dump_vdso_pages(struct vm_area_struct * vma)
struct page *pg = virt_to_page(vdso32_kbase +
i*PAGE_SIZE);
struct page *upg = (vma && vma->vm_mm) ?
follow_page(vma->vm_mm, vma->vm_start +
i*PAGE_SIZE, 0)
follow_page(vma, vma->vm_start + i*PAGE_SIZE, 0)
: NULL;
dump_one_vdso_page(pg, upg);
}
@ -157,8 +156,7 @@ static void dump_vdso_pages(struct vm_area_struct * vma)
struct page *pg = virt_to_page(vdso64_kbase +
i*PAGE_SIZE);
struct page *upg = (vma && vma->vm_mm) ?
follow_page(vma->vm_mm, vma->vm_start +
i*PAGE_SIZE, 0)
follow_page(vma, vma->vm_start + i*PAGE_SIZE, 0)
: NULL;
dump_one_vdso_page(pg, upg);
}

2
arch/ppc/kernel/ppc_ksyms.c
View File

@ -184,7 +184,7 @@ EXPORT_SYMBOL(kernel_thread);
EXPORT_SYMBOL(flush_instruction_cache);
EXPORT_SYMBOL(giveup_fpu);
EXPORT_SYMBOL(flush_icache_range);
EXPORT_SYMBOL(__flush_icache_range);
EXPORT_SYMBOL(flush_dcache_range);
EXPORT_SYMBOL(flush_icache_user_range);
EXPORT_SYMBOL(flush_dcache_page);

6
arch/ppc/kernel/process.c
View File

@ -417,6 +417,7 @@ void show_regs(struct pt_regs * regs)
void exit_thread(void)
{
preempt_disable();
if (last_task_used_math == current)
last_task_used_math = NULL;
if (last_task_used_altivec == current)
@ -425,10 +426,12 @@ void exit_thread(void)
if (last_task_used_spe == current)
last_task_used_spe = NULL;
#endif
preempt_enable();
}
void flush_thread(void)
{
preempt_disable();
if (last_task_used_math == current)
last_task_used_math = NULL;
if (last_task_used_altivec == current)
@ -437,6 +440,7 @@ void flush_thread(void)
if (last_task_used_spe == current)
last_task_used_spe = NULL;
#endif
preempt_enable();
}
void
@ -535,6 +539,7 @@ void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp)
regs->nip = nip;
regs->gpr[1] = sp;
regs->msr = MSR_USER;
preempt_disable();
if (last_task_used_math == current)
last_task_used_math = NULL;
if (last_task_used_altivec == current)
@ -543,6 +548,7 @@ void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp)
if (last_task_used_spe == current)
last_task_used_spe = NULL;
#endif
preempt_enable();
memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
current->thread.fpscr.val = 0;
#ifdef CONFIG_ALTIVEC

10
arch/sparc/mm/generic.c
View File

@ -32,9 +32,7 @@ static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte, unsigne
if (end > PMD_SIZE)
end = PMD_SIZE;
do {
pte_t oldpage = *pte;
pte_clear(mm, address, pte);
set_pte(pte, mk_pte_io(offset, prot, space));
set_pte_at(mm, address, pte, mk_pte_io(offset, prot, space));
address += PAGE_SIZE;
offset += PAGE_SIZE;
pte++;
@ -63,7 +61,7 @@ static inline int io_remap_pmd_range(struct mm_struct *mm, pmd_t * pmd, unsigned
}
int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
unsigned long pfn, unsigned long size, pgprot_t prot)
unsigned long pfn, unsigned long size, pgprot_t prot)
{
int error = 0;
pgd_t * dir;
@ -74,7 +72,9 @@ int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT;
/* See comment in mm/memory.c remap_pfn_range */
vma->vm_flags |= VM_IO | VM_RESERVED | VM_UNPAGED;
vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP;
vma->vm_pgoff = (offset >> PAGE_SHIFT) |
((unsigned long)space << 28UL);
prot = __pgprot(pg_iobits);
offset -= from;

16
arch/sparc64/mm/generic.c
View File

@ -15,6 +15,15 @@
#include <asm/page.h>
#include <asm/tlbflush.h>
static inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space)
{
pte_t pte;
pte_val(pte) = (((page) | pgprot_val(prot) | _PAGE_E) &
~(unsigned long)_PAGE_CACHE);
pte_val(pte) |= (((unsigned long)space) << 32);
return pte;
}
/* Remap IO memory, the same way as remap_pfn_range(), but use
* the obio memory space.
*
@ -68,6 +77,7 @@ static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte,
BUG_ON(!pte_none(*pte));
set_pte_at(mm, address, pte, entry);
address += PAGE_SIZE;
pte_val(entry) += PAGE_SIZE;
pte++;
} while (address < curend);
} while (address < end);
@ -126,9 +136,13 @@ int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
struct mm_struct *mm = vma->vm_mm;
int space = GET_IOSPACE(pfn);
unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT;
unsigned long phys_base;
phys_base = offset | (((unsigned long) space) << 32UL);
/* See comment in mm/memory.c remap_pfn_range */
vma->vm_flags |= VM_IO | VM_RESERVED | VM_UNPAGED;
vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP;
vma->vm_pgoff = phys_base >> PAGE_SHIFT;
prot = __pgprot(pg_iobits);
offset -= from;

7
drivers/atm/Kconfig
View File

@ -5,6 +5,13 @@
menu "ATM drivers"
depends on NETDEVICES && ATM
config ATM_DUMMY
tristate "Dummy ATM driver"
depends on ATM
help
Dummy ATM driver. Useful for proxy signalling, testing,
and development. If unsure, say N.
config ATM_TCP
tristate "ATM over TCP"
depends on INET && ATM

1
drivers/atm/Makefile
View File

@ -31,6 +31,7 @@ ifeq ($(CONFIG_ATM_IDT77252_USE_SUNI),y)
obj-$(CONFIG_ATM_IDT77252) += suni.o
endif
obj-$(CONFIG_ATM_DUMMY) += adummy.o
obj-$(CONFIG_ATM_TCP) += atmtcp.o
obj-$(CONFIG_ATM_FIRESTREAM) += firestream.o
obj-$(CONFIG_ATM_LANAI) += lanai.o

168
drivers/atm/adummy.c Normal file
View File

@ -0,0 +1,168 @@
/*
* adummy.c: a dummy ATM driver
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/skbuff.h>
#include <linux/pci.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include <asm/byteorder.h>
#include <asm/uaccess.h>
#include <linux/atmdev.h>
#include <linux/atm.h>
#include <linux/sonet.h>
/* version definition */
#define DRV_VERSION "1.0"
#define DEV_LABEL "adummy"
#define ADUMMY_DEV(dev) ((struct adummy_dev *) (dev)->dev_data)
struct adummy_dev {
struct atm_dev *atm_dev;
struct list_head entry;
};
/* globals */
static LIST_HEAD(adummy_devs);
static int __init
adummy_start(struct atm_dev *dev)
{
dev->ci_range.vpi_bits = 4;
dev->ci_range.vci_bits = 12;
return 0;
}
static int
adummy_open(struct atm_vcc *vcc)
{
short vpi = vcc->vpi;
int vci = vcc->vci;
if (vci == ATM_VCI_UNSPEC || vpi == ATM_VPI_UNSPEC)
return 0;
set_bit(ATM_VF_ADDR, &vcc->flags);
set_bit(ATM_VF_READY, &vcc->flags);
return 0;
}
static void
adummy_close(struct atm_vcc *vcc)
{
clear_bit(ATM_VF_READY, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
}
static int
adummy_send(struct atm_vcc *vcc, struct sk_buff *skb)
{
if (vcc->pop)
vcc->pop(vcc, skb);
else
dev_kfree_skb_any(skb);
atomic_inc(&vcc->stats->tx);
return 0;
}
static int
adummy_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
{
int left = *pos;
if (!left--)
return sprintf(page, "version %s\n", DRV_VERSION);
return 0;
}
static struct atmdev_ops adummy_ops =
{
.open = adummy_open,
.close = adummy_close,
.send = adummy_send,
.proc_read = adummy_proc_read,
.owner = THIS_MODULE
};
static int __init adummy_init(void)
{
struct atm_dev *atm_dev;
struct adummy_dev *adummy_dev;
int err = 0;
printk(KERN_ERR "adummy: version %s\n", DRV_VERSION);
adummy_dev = (struct adummy_dev *) kmalloc(sizeof(struct adummy_dev),
GFP_KERNEL);
if (!adummy_dev) {
printk(KERN_ERR DEV_LABEL ": kmalloc() failed\n");
err = -ENOMEM;
goto out;
}
memset(adummy_dev, 0, sizeof(struct adummy_dev));
atm_dev = atm_dev_register(DEV_LABEL, &adummy_ops, -1, 0);
if (!atm_dev) {
printk(KERN_ERR DEV_LABEL ": atm_dev_register() failed\n");
err = -ENODEV;
goto out_kfree;
}
adummy_dev->atm_dev = atm_dev;
atm_dev->dev_data = adummy_dev;
if (adummy_start(atm_dev)) {
printk(KERN_ERR DEV_LABEL ": adummy_start() failed\n");
err = -ENODEV;
goto out_unregister;
}
list_add(&adummy_dev->entry, &adummy_devs);
out:
return err;
out_unregister:
atm_dev_deregister(atm_dev);
out_kfree:
kfree(adummy_dev);
goto out;
}
static void __exit adummy_cleanup(void)
{
struct adummy_dev *adummy_dev, *next;
list_for_each_entry_safe(adummy_dev, next, &adummy_devs, entry) {
atm_dev_deregister(adummy_dev->atm_dev);
kfree(adummy_dev);
}
}
module_init(adummy_init);
module_exit(adummy_cleanup);
MODULE_AUTHOR("chas williams <chas@cmf.nrl.navy.mil>");
MODULE_DESCRIPTION("dummy ATM driver");
MODULE_LICENSE("GPL");

54
drivers/atm/atmdev_init.c
View File

@ -1,54 +0,0 @@
/* drivers/atm/atmdev_init.c - ATM device driver initialization */
/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
#include <linux/config.h>
#include <linux/init.h>
#ifdef CONFIG_ATM_ZATM
extern int zatm_detect(void);
#endif
#ifdef CONFIG_ATM_AMBASSADOR
extern int amb_detect(void);
#endif
#ifdef CONFIG_ATM_HORIZON
extern int hrz_detect(void);
#endif
#ifdef CONFIG_ATM_FORE200E
extern int fore200e_detect(void);
#endif
#ifdef CONFIG_ATM_LANAI
extern int lanai_detect(void);
#endif
/*
* For historical reasons, atmdev_init returns the number of devices found.
* Note that some detections may not go via atmdev_init (e.g. eni.c), so this
* number is meaningless.
*/
int __init atmdev_init(void)
{
int devs;
devs = 0;
#ifdef CONFIG_ATM_ZATM
devs += zatm_detect();
#endif
#ifdef CONFIG_ATM_AMBASSADOR
devs += amb_detect();
#endif
#ifdef CONFIG_ATM_HORIZON
devs += hrz_detect();
#endif
#ifdef CONFIG_ATM_FORE200E
devs += fore200e_detect();
#endif
#ifdef CONFIG_ATM_LANAI
devs += lanai_detect();
#endif
return devs;
}

20
drivers/atm/atmtcp.c
View File

@ -246,10 +246,6 @@ static void atmtcp_c_close(struct atm_vcc *vcc)
{
struct atm_dev *atmtcp_dev;
struct atmtcp_dev_data *dev_data;
struct sock *s;
struct hlist_node *node;
struct atm_vcc *walk;
int i;
atmtcp_dev = (struct atm_dev *) vcc->dev_data;
dev_data = PRIV(atmtcp_dev);
@ -257,20 +253,8 @@ static void atmtcp_c_close(struct atm_vcc *vcc)
if (dev_data->persist) return;
atmtcp_dev->dev_data = NULL;
kfree(dev_data);
shutdown_atm_dev(atmtcp_dev);
atm_dev_deregister(atmtcp_dev);
vcc->dev_data = NULL;
read_lock(&vcc_sklist_lock);
for(i = 0; i < VCC_HTABLE_SIZE; ++i) {
struct hlist_head *head = &vcc_hash[i];
sk_for_each(s, node, head) {
walk = atm_sk(s);
if (walk->dev != atmtcp_dev)
continue;
wake_up(s->sk_sleep);
}
}
read_unlock(&vcc_sklist_lock);
module_put(THIS_MODULE);
}
@ -450,7 +434,7 @@ static int atmtcp_remove_persistent(int itf)
if (PRIV(dev)->vcc) return 0;
kfree(dev_data);
atm_dev_put(dev);
shutdown_atm_dev(dev);
atm_dev_deregister(dev);
return 0;
}

102
drivers/atm/lanai.c
View File

@ -39,7 +39,7 @@
* o lanai_change_qos() isn't written yet
*
* o There aren't any ioctl's yet -- I'd like to eventually support
* setting loopback and LED modes that way. (see lanai_ioctl)
* setting loopback and LED modes that way.
*
* o If the segmentation engine or DMA gets shut down we should restart
* card as per section 17.0i. (see lanai_reset)
@ -305,7 +305,7 @@ struct lanai_dev {
* vci with their bit set
*/
static void vci_bitfield_iterate(struct lanai_dev *lanai,
/*const*/ unsigned long *lp,
const unsigned long *lp,
void (*func)(struct lanai_dev *,vci_t vci))
{
vci_t vci = find_first_bit(lp, NUM_VCI);
@ -951,7 +951,7 @@ static int __devinit eeprom_read(struct lanai_dev *lanai)
/* read a big-endian 4-byte value out of eeprom */
static inline u32 eeprom_be4(const struct lanai_dev *lanai, int address)
{
return be32_to_cpup((u32 *) (&lanai->eeprom[address]));
return be32_to_cpup((const u32 *) &lanai->eeprom[address]);
}
/* Checksum/validate EEPROM contents */
@ -1160,7 +1160,7 @@ static inline int vcc_tx_space(const struct lanai_vcc *lvcc, int endptr)
}
/* test if VCC is currently backlogged */
static inline int vcc_is_backlogged(/*const*/ struct lanai_vcc *lvcc)
static inline int vcc_is_backlogged(const struct lanai_vcc *lvcc)
{
return !skb_queue_empty(&lvcc->tx.backlog);
}
@ -1395,7 +1395,8 @@ static void vcc_rx_aal5(struct lanai_vcc *lvcc, int endptr)
{
int size;
struct sk_buff *skb;
/*const*/ u32 *x, *end = &lvcc->rx.buf.start[endptr * 4];
const u32 *x;
u32 *end = &lvcc->rx.buf.start[endptr * 4];
int n = ((unsigned long) end) - ((unsigned long) lvcc->rx.buf.ptr);
if (n < 0)
n += lanai_buf_size(&lvcc->rx.buf);
@ -2111,7 +2112,7 @@ static int lanai_normalize_ci(struct lanai_dev *lanai,
* shifted by that much as we compute
*
*/
static int pcr_to_cbricg(/*const*/ struct atm_qos *qos)
static int pcr_to_cbricg(const struct atm_qos *qos)
{
int rounddown = 0; /* 1 = Round PCR down, i.e. round ICG _up_ */
int x, icg, pcr = atm_pcr_goal(&qos->txtp);
@ -2434,93 +2435,6 @@ static int lanai_open(struct atm_vcc *atmvcc)
return result;
}
#if 0
/* ioctl operations for card */
/* NOTE: these are all DEBUGGING ONLY currently */
static int lanai_ioctl(struct atm_dev *atmdev, unsigned int cmd, void __user *arg)
{
int result = 0;
struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
switch(cmd) {
case 2106275:
shutdown_atm_dev(atmdev);
return 0;
case 2200000: {
unsigned long flags;
spin_lock_irqsave(&lanai->servicelock, flags);
run_service(lanai);
spin_unlock_irqrestore(&lanai->servicelock, flags);
return 0; }
case 2200002:
get_statistics(lanai);
return 0;
case 2200003: {
unsigned int i;
for (i = 0; i <= 0x5C ; i += 4) {
if (i==0x48) /* Write-only butt reg */
continue;
printk(KERN_CRIT DEV_LABEL " 0x%02X: "
"0x%08X\n", i,
(unsigned int) readl(lanai->base + i));
barrier(); mb();
pcistatus_check(lanai, 0);
barrier(); mb();
}
return 0; }
case 2200004: {
u8 b;
u16 w;
u32 dw;
struct pci_dev *pci = lanai->pci;
(void) pci_read_config_word(pci, PCI_VENDOR_ID, &w);
DPRINTK("vendor = 0x%X\n", (unsigned int) w);
(void) pci_read_config_word(pci, PCI_DEVICE_ID, &w);
DPRINTK("device = 0x%X\n", (unsigned int) w);
(void) pci_read_config_word(pci, PCI_COMMAND, &w);
DPRINTK("command = 0x%X\n", (unsigned int) w);
(void) pci_read_config_word(pci, PCI_STATUS, &w);
DPRINTK("status = 0x%X\n", (unsigned int) w);
(void) pci_read_config_dword(pci,
PCI_CLASS_REVISION, &dw);
DPRINTK("class/revision = 0x%X\n", (unsigned int) dw);
(void) pci_read_config_byte(pci,
PCI_CACHE_LINE_SIZE, &b);
DPRINTK("cache line size = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_LATENCY_TIMER, &b);
DPRINTK("latency = %d (0x%X)\n",
(int) b, (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_HEADER_TYPE, &b);
DPRINTK("header type = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_BIST, &b);
DPRINTK("bist = 0x%X\n", (unsigned int) b);
/* skipping a few here */
(void) pci_read_config_byte(pci,
PCI_INTERRUPT_LINE, &b);
DPRINTK("pci_int_line = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci,
PCI_INTERRUPT_PIN, &b);
DPRINTK("pci_int_pin = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_MIN_GNT, &b);
DPRINTK("min_gnt = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_MAX_LAT, &b);
DPRINTK("max_lat = 0x%X\n", (unsigned int) b); }
return 0;
#ifdef USE_POWERDOWN
case 2200005:
DPRINTK("Coming out of powerdown\n");
lanai->conf1 &= ~CONFIG1_POWERDOWN;
conf1_write(lanai);
return 0;
#endif
default:
result = -ENOIOCTLCMD;
}
return result;
}
#else /* !0 */
#define lanai_ioctl NULL
#endif /* 0 */
static int lanai_send(struct atm_vcc *atmvcc, struct sk_buff *skb)
{
struct lanai_vcc *lvcc = (struct lanai_vcc *) atmvcc->dev_data;
@ -2678,7 +2592,6 @@ static const struct atmdev_ops ops = {
.dev_close = lanai_dev_close,
.open = lanai_open,
.close = lanai_close,
.ioctl = lanai_ioctl,
.getsockopt = NULL,
.setsockopt = NULL,
.send = lanai_send,
@ -2760,6 +2673,7 @@ static void __exit lanai_module_exit(void)
* gone, so there isn't much to do
*/
DPRINTK("cleanup_module()\n");
pci_unregister_driver(&lanai_driver);
}
module_init(lanai_module_init);

2
drivers/char/mem.c
View File

@ -591,7 +591,7 @@ static inline size_t read_zero_pagealigned(char __user * buf, size_t size)
if (vma->vm_start > addr || (vma->vm_flags & VM_WRITE) == 0)
goto out_up;
if (vma->vm_flags & (VM_SHARED | VM_HUGETLB | VM_UNPAGED))
if (vma->vm_flags & (VM_SHARED | VM_HUGETLB))
break;
count = vma->vm_end - addr;
if (count > size)

12
drivers/cpufreq/cpufreq.c
View File

@ -1113,21 +1113,13 @@ int __cpufreq_driver_target(struct cpufreq_policy *policy,
{
int retval = -EINVAL;
/*
* If we are already in context of hotplug thread, we dont need to
* acquire the hotplug lock. Otherwise acquire cpucontrol to prevent
* hotplug from removing this cpu that we are working on.
*/
if (!current_in_cpu_hotplug())
lock_cpu_hotplug();
lock_cpu_hotplug();
dprintk("target for CPU %u: %u kHz, relation %u\n", policy->cpu,
target_freq, relation);
if (cpu_online(policy->cpu) && cpufreq_driver->target)
retval = cpufreq_driver->target(policy, target_freq, relation);
if (!current_in_cpu_hotplug())
unlock_cpu_hotplug();
unlock_cpu_hotplug();
return retval;
}

4
drivers/md/md.c
View File

@ -1028,7 +1028,6 @@ static int super_1_validate(mddev_t *mddev, mdk_rdev_t *rdev)
mddev->size = le64_to_cpu(sb->size)/2;
mddev->events = le64_to_cpu(sb->events);
mddev->bitmap_offset = 0;
mddev->default_bitmap_offset = 0;
mddev->default_bitmap_offset = 1024;
mddev->recovery_cp = le64_to_cpu(sb->resync_offset);
@ -2932,6 +2931,9 @@ static int set_array_info(mddev_t * mddev, mdu_array_info_t *info)
mddev->sb_dirty = 1;
mddev->default_bitmap_offset = MD_SB_BYTES >> 9;
mddev->bitmap_offset = 0;
/*
* Generate a 128 bit UUID
*/

8
drivers/md/raid1.c
View File

@ -953,9 +953,6 @@ static int raid1_add_disk(mddev_t *mddev, mdk_rdev_t *rdev)
int mirror = 0;
mirror_info_t *p;
if (rdev->saved_raid_disk >= 0 &&
conf->mirrors[rdev->saved_raid_disk].rdev == NULL)
mirror = rdev->saved_raid_disk;
for (mirror=0; mirror < mddev->raid_disks; mirror++)
if ( !(p=conf->mirrors+mirror)->rdev) {
@ -972,7 +969,10 @@ static int raid1_add_disk(mddev_t *mddev, mdk_rdev_t *rdev)
p->head_position = 0;
rdev->raid_disk = mirror;
found = 1;
if (rdev->saved_raid_disk != mirror)
/* As all devices are equivalent, we don't need a full recovery
* if this was recently any drive of the array
*/
if (rdev->saved_raid_disk < 0)
conf->fullsync = 1;
rcu_assign_pointer(p->rdev, rdev);
break;

6
drivers/md/raid10.c
View File

@ -552,7 +552,11 @@ static int read_balance(conf_t *conf, r10bio_t *r10_bio)
!test_bit(In_sync, &rdev->flags))
continue;
if (!atomic_read(&rdev->nr_pending)) {
/* This optimisation is debatable, and completely destroys
* sequential read speed for 'far copies' arrays. So only
* keep it for 'near' arrays, and review those later.
*/
if (conf->near_copies > 1 && !atomic_read(&rdev->nr_pending)) {
disk = ndisk;
slot = nslot;
break;

2
drivers/md/raid5.c
View File

@ -1704,7 +1704,9 @@ static void raid5d (mddev_t *mddev)
if (conf->seq_flush - conf->seq_write > 0) {
int seq = conf->seq_flush;
spin_unlock_irq(&conf->device_lock);
bitmap_unplug(mddev->bitmap);
spin_lock_irq(&conf->device_lock);
conf->seq_write = seq;
activate_bit_delay(conf);
}

27
drivers/md/raid6main.c
View File

@ -1702,6 +1702,8 @@ static sector_t sync_request(mddev_t *mddev, sector_t sector_nr, int *skipped, i
int data_disks = raid_disks - 2;
sector_t max_sector = mddev->size << 1;
int sync_blocks;
int still_degraded = 0;
int i;
if (sector_nr >= max_sector) {
/* just being told to finish up .. nothing much to do */
@ -1710,7 +1712,7 @@ static sector_t sync_request(mddev_t *mddev, sector_t sector_nr, int *skipped, i
if (mddev->curr_resync < max_sector) /* aborted */
bitmap_end_sync(mddev->bitmap, mddev->curr_resync,
&sync_blocks, 1);
else /* compelted sync */
else /* completed sync */
conf->fullsync = 0;
bitmap_close_sync(mddev->bitmap);
@ -1748,7 +1750,16 @@ static sector_t sync_request(mddev_t *mddev, sector_t sector_nr, int *skipped, i
*/
schedule_timeout_uninterruptible(1);
}
bitmap_start_sync(mddev->bitmap, sector_nr, &sync_blocks, 0);
/* Need to check if array will still be degraded after recovery/resync
* We don't need to check the 'failed' flag as when that gets set,
* recovery aborts.
*/
for (i=0; i<mddev->raid_disks; i++)
if (conf->disks[i].rdev == NULL)
still_degraded = 1;
bitmap_start_sync(mddev->bitmap, sector_nr, &sync_blocks, still_degraded);
spin_lock(&sh->lock);
set_bit(STRIPE_SYNCING, &sh->state);
clear_bit(STRIPE_INSYNC, &sh->state);
@ -1784,7 +1795,9 @@ static void raid6d (mddev_t *mddev)
if (conf->seq_flush - conf->seq_write > 0) {
int seq = conf->seq_flush;
spin_unlock_irq(&conf->device_lock);
bitmap_unplug(mddev->bitmap);
spin_lock_irq(&conf->device_lock);
conf->seq_write = seq;
activate_bit_delay(conf);
}
@ -2145,9 +2158,15 @@ static int raid6_add_disk(mddev_t *mddev, mdk_rdev_t *rdev)
/* no point adding a device */
return 0;
/*
* find the disk ...
* find the disk ... but prefer rdev->saved_raid_disk
* if possible.
*/
for (disk=0; disk < mddev->raid_disks; disk++)
if (rdev->saved_raid_disk >= 0 &&
conf->disks[rdev->saved_raid_disk].rdev == NULL)
disk = rdev->saved_raid_disk;
else
disk = 0;
for ( ; disk < mddev->raid_disks; disk++)
if ((p=conf->disks + disk)->rdev == NULL) {
clear_bit(In_sync, &rdev->flags);
rdev->raid_disk = disk;

2
drivers/media/video/Kconfig
View File

@ -26,7 +26,7 @@ config VIDEO_BT848
module will be called bttv.
config VIDEO_BT848_DVB
tristate "DVB/ATSC Support for bt878 based TV cards"
bool "DVB/ATSC Support for bt878 based TV cards"
depends on VIDEO_BT848 && DVB_CORE
select DVB_BT8XX
---help---

20
drivers/media/video/cx88/Kconfig
View File

@ -46,8 +46,8 @@ config VIDEO_CX88_DVB_ALL_FRONTENDS
If you are unsure, choose Y.
config VIDEO_CX88_DVB_MT352
tristate "Zarlink MT352 DVB-T Support"
default m
bool "Zarlink MT352 DVB-T Support"
default y
depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
select DVB_MT352
---help---
@ -55,8 +55,8 @@ config VIDEO_CX88_DVB_MT352
Connexant 2388x chip and the MT352 demodulator.
config VIDEO_CX88_DVB_OR51132
tristate "OR51132 ATSC Support"
default m
bool "OR51132 ATSC Support"
default y
depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
select DVB_OR51132
---help---
@ -64,8 +64,8 @@ config VIDEO_CX88_DVB_OR51132
Connexant 2388x chip and the OR51132 demodulator.
config VIDEO_CX88_DVB_CX22702
tristate "Conexant CX22702 DVB-T Support"
default m
bool "Conexant CX22702 DVB-T Support"
default y
depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
select DVB_CX22702
---help---
@ -73,8 +73,8 @@ config VIDEO_CX88_DVB_CX22702
Connexant 2388x chip and the CX22702 demodulator.
config VIDEO_CX88_DVB_LGDT330X
tristate "LG Electronics DT3302/DT3303 ATSC Support"
default m
bool "LG Electronics DT3302/DT3303 ATSC Support"
default y
depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
select DVB_LGDT330X
---help---
@ -82,8 +82,8 @@ config VIDEO_CX88_DVB_LGDT330X
Connexant 2388x chip and the LGDT3302/LGDT3303 demodulator.
config VIDEO_CX88_DVB_NXT200X
tristate "NXT2002/NXT2004 ATSC Support"
default m
bool "NXT2002/NXT2004 ATSC Support"
default y
depends on VIDEO_CX88_DVB && !VIDEO_CX88_DVB_ALL_FRONTENDS
select DVB_NXT200X
---help---

27
drivers/media/video/cx88/Makefile
View File

@ -9,21 +9,12 @@ obj-$(CONFIG_VIDEO_CX88_DVB) += cx88-dvb.o
EXTRA_CFLAGS += -I$(src)/..
EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core
EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/frontends
ifneq ($(CONFIG_VIDEO_BUF_DVB),n)
EXTRA_CFLAGS += -DHAVE_VIDEO_BUF_DVB=1
endif
ifneq ($(CONFIG_DVB_CX22702),n)
EXTRA_CFLAGS += -DHAVE_CX22702=1
endif
ifneq ($(CONFIG_DVB_OR51132),n)
EXTRA_CFLAGS += -DHAVE_OR51132=1
endif
ifneq ($(CONFIG_DVB_LGDT330X),n)
EXTRA_CFLAGS += -DHAVE_LGDT330X=1
endif
ifneq ($(CONFIG_DVB_MT352),n)
EXTRA_CFLAGS += -DHAVE_MT352=1
endif
ifneq ($(CONFIG_DVB_NXT200X),n)
EXTRA_CFLAGS += -DHAVE_NXT200X=1
endif
extra-cflags-$(CONFIG_VIDEO_BUF_DVB) += -DHAVE_VIDEO_BUF_DVB=1
extra-cflags-$(CONFIG_DVB_CX22702) += -DHAVE_CX22702=1
extra-cflags-$(CONFIG_DVB_OR51132) += -DHAVE_OR51132=1
extra-cflags-$(CONFIG_DVB_LGDT330X) += -DHAVE_LGDT330X=1
extra-cflags-$(CONFIG_DVB_MT352) += -DHAVE_MT352=1
extra-cflags-$(CONFIG_DVB_NXT200X) += -DHAVE_NXT200X=1
EXTRA_CFLAGS += $(extra-cflags-y) $(extra-cflags-m)

12
drivers/media/video/saa7134/Kconfig
View File

@ -42,8 +42,8 @@ config VIDEO_SAA7134_DVB_ALL_FRONTENDS
If you are unsure, choose Y.
config VIDEO_SAA7134_DVB_MT352
tristate "Zarlink MT352 DVB-T Support"
default m
bool "Zarlink MT352 DVB-T Support"
default y
depends on VIDEO_SAA7134_DVB && !VIDEO_SAA7134_DVB_ALL_FRONTENDS
select DVB_MT352
---help---
@ -51,8 +51,8 @@ config VIDEO_SAA7134_DVB_MT352
Philips saa7134 chip and the MT352 demodulator.
config VIDEO_SAA7134_DVB_TDA1004X
tristate "Phillips TDA10045H/TDA10046H DVB-T Support"
default m
bool "Phillips TDA10045H/TDA10046H DVB-T Support"
default y
depends on VIDEO_SAA7134_DVB && !VIDEO_SAA7134_DVB_ALL_FRONTENDS
select DVB_TDA1004X
---help---
@ -60,8 +60,8 @@ config VIDEO_SAA7134_DVB_TDA1004X
Philips saa7134 chip and the TDA10045H/TDA10046H demodulator.
config VIDEO_SAA7134_DVB_NXT200X
tristate "NXT2002/NXT2004 ATSC Support"
default m
bool "NXT2002/NXT2004 ATSC Support"
default y
depends on VIDEO_SAA7134_DVB && !VIDEO_SAA7134_DVB_ALL_FRONTENDS
select DVB_NXT200X
---help---

19
drivers/media/video/saa7134/Makefile
View File

@ -11,15 +11,10 @@ obj-$(CONFIG_VIDEO_SAA7134_DVB) += saa7134-dvb.o
EXTRA_CFLAGS += -I$(src)/..
EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core
EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/frontends
ifneq ($(CONFIG_VIDEO_BUF_DVB),n)
EXTRA_CFLAGS += -DHAVE_VIDEO_BUF_DVB=1
endif
ifneq ($(CONFIG_DVB_MT352),n)
EXTRA_CFLAGS += -DHAVE_MT352=1
endif
ifneq ($(CONFIG_DVB_TDA1004X),n)
EXTRA_CFLAGS += -DHAVE_TDA1004X=1
endif
ifneq ($(CONFIG_DVB_NXT200X),n)
EXTRA_CFLAGS += -DHAVE_NXT200X=1
endif
extra-cflags-$(CONFIG_VIDEO_BUF_DVB) += -DHAVE_VIDEO_BUF_DVB=1
extra-cflags-$(CONFIG_DVB_MT352) += -DHAVE_MT352=1
extra-cflags-$(CONFIG_DVB_TDA1004X) += -DHAVE_TDA1004X=1
extra-cflags-$(CONFIG_DVB_NXT200X) += -DHAVE_NXT200X=1
EXTRA_CFLAGS += $(extra-cflags-y) $(extra-cflags-m)

6
drivers/message/fusion/mptbase.c
View File

@ -91,9 +91,9 @@ static int mfcounter = 0;
* Public data...
*/
int mpt_lan_index = -1;
static int mpt_stm_index = -1;
int mpt_stm_index = -1;
static struct proc_dir_entry *mpt_proc_root_dir;
struct proc_dir_entry *mpt_proc_root_dir;
#define WHOINIT_UNKNOWN 0xAA
@ -6271,6 +6271,7 @@ EXPORT_SYMBOL(mpt_resume);
EXPORT_SYMBOL(mpt_suspend);
#endif
EXPORT_SYMBOL(ioc_list);
EXPORT_SYMBOL(mpt_proc_root_dir);
EXPORT_SYMBOL(mpt_register);
EXPORT_SYMBOL(mpt_deregister);
EXPORT_SYMBOL(mpt_event_register);
@ -6288,6 +6289,7 @@ EXPORT_SYMBOL(mpt_verify_adapter);
EXPORT_SYMBOL(mpt_GetIocState);
EXPORT_SYMBOL(mpt_print_ioc_summary);
EXPORT_SYMBOL(mpt_lan_index);
EXPORT_SYMBOL(mpt_stm_index);
EXPORT_SYMBOL(mpt_HardResetHandler);
EXPORT_SYMBOL(mpt_config);
EXPORT_SYMBOL(mpt_toolbox);

2
drivers/message/fusion/mptbase.h
View File

@ -1006,8 +1006,10 @@ extern int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
* Public data decl's...
*/
extern struct list_head ioc_list;
extern struct proc_dir_entry *mpt_proc_root_dir;
extern int mpt_lan_index; /* needed by mptlan.c */
extern int mpt_stm_index; /* needed by mptstm.c */
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#endif /* } __KERNEL__ */

2
drivers/mmc/mmc.c
View File

@ -816,7 +816,7 @@ static void mmc_discover_cards(struct mmc_host *host)
cmd.opcode = SD_SEND_RELATIVE_ADDR;
cmd.arg = 0;
cmd.flags = MMC_RSP_R1;
cmd.flags = MMC_RSP_R6;
err = mmc_wait_for_cmd(host, &cmd, CMD_RETRIES);
if (err != MMC_ERR_NONE)

10
drivers/mtd/chips/cfi_cmdset_0001.c
View File

@ -4,7 +4,7 @@
*
* (C) 2000 Red Hat. GPL'd
*
* $Id: cfi_cmdset_0001.c,v 1.185 2005/11/07 11:14:22 gleixner Exp $
* $Id: cfi_cmdset_0001.c,v 1.186 2005/11/23 22:07:52 nico Exp $
*
*
* 10/10/2000 Nicolas Pitre <nico@cam.org>
@ -644,9 +644,8 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
*
* - contension arbitration is handled in the owner's context.
*
* The 'shared' struct can be read when its lock is taken.
* However any writes to it can only be made when the current
* owner's lock is also held.
* The 'shared' struct can be read and/or written only when
* its lock is taken.
*/
struct flchip_shared *shared = chip->priv;
struct flchip *contender;
@ -675,14 +674,13 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
}
timeo = jiffies + HZ;
spin_lock(&shared->lock);
spin_unlock(contender->mutex);
}
/* We now own it */
shared->writing = chip;
if (mode == FL_ERASING)
shared->erasing = chip;
if (contender && contender != chip)
spin_unlock(contender->mutex);
spin_unlock(&shared->lock);
}

8
drivers/mtd/chips/cfi_probe.c
View File

@ -1,7 +1,7 @@
/*
Common Flash Interface probe code.
(C) 2000 Red Hat. GPL'd.
$Id: cfi_probe.c,v 1.84 2005/11/07 11:14:23 gleixner Exp $
$Id: cfi_probe.c,v 1.86 2005/11/29 14:48:31 gleixner Exp $
*/
#include <linux/config.h>
@ -230,8 +230,8 @@ static int __xipram cfi_chip_setup(struct map_info *map,
cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL);
cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL);
cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL);
cfi->mfr = cfi_read_query(map, base);
cfi->id = cfi_read_query(map, base + ofs_factor);
cfi->mfr = cfi_read_query16(map, base);
cfi->id = cfi_read_query16(map, base + ofs_factor);
/* Put it back into Read Mode */
cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
@ -426,7 +426,7 @@ static struct mtd_chip_driver cfi_chipdrv = {
.module = THIS_MODULE
};
int __init cfi_probe_init(void)
static int __init cfi_probe_init(void)
{
register_mtd_chip_driver(&cfi_chipdrv);
return 0;

123
drivers/mtd/chips/sharp.c
View File

@ -4,7 +4,7 @@
* Copyright 2000,2001 David A. Schleef <ds@schleef.org>
* 2000,2001 Lineo, Inc.
*
* $Id: sharp.c,v 1.16 2005/11/07 11:14:23 gleixner Exp $
* $Id: sharp.c,v 1.17 2005/11/29 14:28:28 gleixner Exp $
*
* Devices supported:
* LH28F016SCT Symmetrical block flash memory, 2Mx8
@ -160,22 +160,28 @@ struct mtd_info *sharp_probe(struct map_info *map)
return mtd;
}
static inline void sharp_send_cmd(struct map_info *map, unsigned long cmd, unsigned long adr)
{
map_word map_cmd;
map_cmd.x[0] = cmd;
map_write(map, map_cmd, adr);
}
static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
{
unsigned long tmp;
map_word tmp, read0, read4;
unsigned long base = 0;
u32 read0, read4;
int width = 4;
tmp = map_read32(map, base+0);
tmp = map_read(map, base+0);
map_write32(map, CMD_READ_ID, base+0);
sharp_send_cmd(map, CMD_READ_ID, base+0);
read0=map_read32(map, base+0);
read4=map_read32(map, base+4);
if(read0 == 0x89898989){
read0 = map_read(map, base+0);
read4 = map_read(map, base+4);
if(read0.x[0] == 0x89898989){
printk("Looks like sharp flash\n");
switch(read4){
switch(read4.x[0]){
case 0xaaaaaaaa:
case 0xa0a0a0a0:
/* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/
@ -197,16 +203,16 @@ static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
return width;
#endif
default:
printk("Sort-of looks like sharp flash, 0x%08x 0x%08x\n",
read0,read4);
printk("Sort-of looks like sharp flash, 0x%08lx 0x%08lx\n",
read0.x[0], read4.x[0]);
}
}else if((map_read32(map, base+0) == CMD_READ_ID)){
}else if((map_read(map, base+0).x[0] == CMD_READ_ID)){
/* RAM, probably */
printk("Looks like RAM\n");
map_write32(map, tmp, base+0);
map_write(map, tmp, base+0);
}else{
printk("Doesn't look like sharp flash, 0x%08x 0x%08x\n",
read0,read4);
printk("Doesn't look like sharp flash, 0x%08lx 0x%08lx\n",
read0.x[0], read4.x[0]);
}
return 0;
@ -215,7 +221,8 @@ static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
/* This function returns with the chip->mutex lock held. */
static int sharp_wait(struct map_info *map, struct flchip *chip)
{
int status, i;
int i;
map_word status;
unsigned long timeo = jiffies + HZ;
DECLARE_WAITQUEUE(wait, current);
int adr = 0;
@ -225,12 +232,12 @@ retry:
switch(chip->state){
case FL_READY:
map_write32(map,CMD_READ_STATUS,adr);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
chip->state = FL_STATUS;
case FL_STATUS:
for(i=0;i<100;i++){
status = map_read32(map,adr);
if((status & SR_READY)==SR_READY)
status = map_read(map, adr);
if((status.x[0] & SR_READY)==SR_READY)
break;
udelay(1);
}
@ -254,7 +261,7 @@ retry:
goto retry;
}
map_write32(map,CMD_RESET, adr);
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
@ -351,37 +358,39 @@ static int sharp_write_oneword(struct map_info *map, struct flchip *chip,
int timeo;
int try;
int i;
int status = 0;
map_word data, status;
status.x[0] = 0;
ret = sharp_wait(map,chip);
for(try=0;try<10;try++){
map_write32(map,CMD_BYTE_WRITE,adr);
sharp_send_cmd(map, CMD_BYTE_WRITE, adr);
/* cpu_to_le32 -> hack to fix the writel be->le conversion */
map_write32(map,cpu_to_le32(datum),adr);
data.x[0] = cpu_to_le32(datum);
map_write(map, data, adr);
chip->state = FL_WRITING;
timeo = jiffies + (HZ/2);
map_write32(map,CMD_READ_STATUS,adr);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
for(i=0;i<100;i++){
status = map_read32(map,adr);
if((status & SR_READY)==SR_READY)
status = map_read(map, adr);
if((status.x[0] & SR_READY) == SR_READY)
break;
}
if(i==100){
printk("sharp: timed out writing\n");
}
if(!(status&SR_ERRORS))
if(!(status.x[0] & SR_ERRORS))
break;
printk("sharp: error writing byte at addr=%08lx status=%08x\n",adr,status);
printk("sharp: error writing byte at addr=%08lx status=%08lx\n", adr, status.x[0]);
map_write32(map,CMD_CLEAR_STATUS,adr);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
}
map_write32(map,CMD_RESET,adr);
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
wake_up(&chip->wq);
@ -434,18 +443,18 @@ static int sharp_do_wait_for_ready(struct map_info *map, struct flchip *chip,
{
int ret;
unsigned long timeo;
int status;
map_word status;
DECLARE_WAITQUEUE(wait, current);
map_write32(map,CMD_READ_STATUS,adr);
status = map_read32(map,adr);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
timeo = jiffies + HZ;
while(time_before(jiffies, timeo)){
map_write32(map,CMD_READ_STATUS,adr);
status = map_read32(map,adr);
if((status & SR_READY)==SR_READY){
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if((status.x[0] & SR_READY)==SR_READY){
ret = 0;
goto out;
}
@ -476,7 +485,7 @@ static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
{
int ret;
//int timeo;
int status;
map_word status;
//int i;
//printk("sharp_erase_oneblock()\n");
@ -486,26 +495,26 @@ static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
sharp_unlock_oneblock(map,chip,adr);
#endif
map_write32(map,CMD_BLOCK_ERASE_1,adr);
map_write32(map,CMD_BLOCK_ERASE_2,adr);
sharp_send_cmd(map, CMD_BLOCK_ERASE_1, adr);
sharp_send_cmd(map, CMD_BLOCK_ERASE_2, adr);
chip->state = FL_ERASING;
ret = sharp_do_wait_for_ready(map,chip,adr);
if(ret<0)return ret;
map_write32(map,CMD_READ_STATUS,adr);
status = map_read32(map,adr);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if(!(status&SR_ERRORS)){
map_write32(map,CMD_RESET,adr);
if(!(status.x[0] & SR_ERRORS)){
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
//spin_unlock_bh(chip->mutex);
return 0;
}
printk("sharp: error erasing block at addr=%08lx status=%08x\n",adr,status);
map_write32(map,CMD_CLEAR_STATUS,adr);
printk("sharp: error erasing block at addr=%08lx status=%08lx\n", adr, status.x[0]);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
//spin_unlock_bh(chip->mutex);
@ -517,20 +526,20 @@ static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
unsigned long adr)
{
int i;
int status;
map_word status;
map_write32(map,CMD_CLEAR_BLOCK_LOCKS_1,adr);
map_write32(map,CMD_CLEAR_BLOCK_LOCKS_2,adr);
sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_1, adr);
sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_2, adr);
udelay(100);
status = map_read32(map,adr);
printk("status=%08x\n",status);
status = map_read(map, adr);
printk("status=%08lx\n", status.x[0]);
for(i=0;i<1000;i++){
//map_write32(map,CMD_READ_STATUS,adr);
status = map_read32(map,adr);
if((status & SR_READY)==SR_READY)
//sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if((status.x[0] & SR_READY) == SR_READY)
break;
udelay(100);
}
@ -538,14 +547,14 @@ static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
printk("sharp: timed out unlocking block\n");
}
if(!(status&SR_ERRORS)){
map_write32(map,CMD_RESET,adr);
if(!(status.x[0] & SR_ERRORS)){
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
return;
}
printk("sharp: error unlocking block at addr=%08lx status=%08x\n",adr,status);
map_write32(map,CMD_CLEAR_STATUS,adr);
printk("sharp: error unlocking block at addr=%08lx status=%08lx\n", adr, status.x[0]);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
}
#endif

6
drivers/mtd/devices/block2mtd.c
View File

@ -1,5 +1,5 @@
/*
* $Id: block2mtd.c,v 1.29 2005/11/07 11:14:24 gleixner Exp $
* $Id: block2mtd.c,v 1.30 2005/11/29 14:48:32 gleixner Exp $
*
* block2mtd.c - create an mtd from a block device
*
@ -19,7 +19,7 @@
#include <linux/mtd/mtd.h>
#include <linux/buffer_head.h>
#define VERSION "$Revision: 1.29 $"
#define VERSION "$Revision: 1.30 $"
#define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args)
@ -40,7 +40,7 @@ static LIST_HEAD(blkmtd_device_list);
#define PAGE_READAHEAD 64
void cache_readahead(struct address_space *mapping, int index)
static void cache_readahead(struct address_space *mapping, int index)
{
filler_t *filler = (filler_t*)mapping->a_ops->readpage;
int i, pagei;

6
drivers/mtd/devices/ms02-nv.c
View File

@ -6,7 +6,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* $Id: ms02-nv.c,v 1.10 2005/06/20 12:24:41 macro Exp $
* $Id: ms02-nv.c,v 1.11 2005/11/14 13:41:47 macro Exp $
*/
#include <linux/init.h>
@ -293,13 +293,13 @@ static int __init ms02nv_init(void)
switch (mips_machtype) {
case MACH_DS5000_200:
csr = (volatile u32 *)KN02_CSR_BASE;
csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
if (*csr & KN02_CSR_BNK32M)
stride = 2;
break;
case MACH_DS5000_2X0:
case MACH_DS5900:
csr = (volatile u32 *)KN03_MCR_BASE;
csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
if (*csr & KN03_MCR_BNK32M)
stride = 2;
break;

6
drivers/mtd/ftl.c
View File

@ -1,5 +1,5 @@
/* This version ported to the Linux-MTD system by dwmw2@infradead.org
* $Id: ftl.c,v 1.58 2005/11/07 11:14:19 gleixner Exp $
* $Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $
*
* Fixes: Arnaldo Carvalho de Melo <acme@conectiva.com.br>
* - fixes some leaks on failure in build_maps and ftl_notify_add, cleanups
@ -1084,9 +1084,9 @@ struct mtd_blktrans_ops ftl_tr = {
.owner = THIS_MODULE,
};
int init_ftl(void)
static int init_ftl(void)
{
DEBUG(0, "$Id: ftl.c,v 1.58 2005/11/07 11:14:19 gleixner Exp $\n");
DEBUG(0, "$Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $\n");
return register_mtd_blktrans(&ftl_tr);
}

6
drivers/mtd/maps/Kconfig
View File

@ -538,12 +538,6 @@ config MTD_MPC1211
This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02).
If you have such a board, say 'Y'.
config MTD_PQ2FADS
tristate "JEDEC flash SIMM mapped on PQ2FADS and 8272ADS boards"
depends on (ADS8272 || PQ2FADS) && MTD_PARTITIONS && MTD_JEDECPROBE && MTD_PHYSMAP && MTD_CFI_GEOMETRY && MTD_CFI_INTELEXT
help
This enables access to flash SIMM on PQ2FADS-like boards
config MTD_OMAP_NOR
tristate "TI OMAP board mappings"
depends on MTD_CFI && ARCH_OMAP

1
drivers/mtd/maps/Makefile
View File

@ -70,6 +70,5 @@ obj-$(CONFIG_MTD_DMV182) += dmv182.o
obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_PQ2FADS) += pq2fads.o
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o

78
drivers/mtd/maps/ixp4xx.c
View File

@ -1,5 +1,5 @@
/*
* $Id: ixp4xx.c,v 1.12 2005/11/07 11:14:27 gleixner Exp $
* $Id: ixp4xx.c,v 1.13 2005/11/16 16:23:21 dvrabel Exp $
*
* drivers/mtd/maps/ixp4xx.c
*
@ -34,10 +34,55 @@
#include <linux/reboot.h>
/*
* Read/write a 16 bit word from flash address 'addr'.
*
* When the cpu is in little-endian mode it swizzles the address lines
* ('address coherency') so we need to undo the swizzling to ensure commands
* and the like end up on the correct flash address.
*
* To further complicate matters, due to the way the expansion bus controller
* handles 32 bit reads, the byte stream ABCD is stored on the flash as:
* D15 D0
* +---+---+
* | A | B | 0
* +---+---+
* | C | D | 2
* +---+---+
* This means that on LE systems each 16 bit word must be swapped. Note that
* this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI
* data and other flash commands which are always in D7-D0.
*/
#ifndef __ARMEB__
#ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP
# error CONFIG_MTD_CFI_BE_BYTE_SWAP required
#endif
static inline u16 flash_read16(void __iomem *addr)
{
return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
}
static inline void flash_write16(u16 d, void __iomem *addr)
{
__raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
}
#define BYTE0(h) ((h) & 0xFF)
#define BYTE1(h) (((h) >> 8) & 0xFF)
#else
static inline u16 flash_read16(const void __iomem *addr)
{
return __raw_readw(addr);
}
static inline void flash_write16(u16 d, void __iomem *addr)
{
__raw_writew(d, addr);
}
#define BYTE0(h) (((h) >> 8) & 0xFF)
#define BYTE1(h) ((h) & 0xFF)
#endif
@ -45,7 +90,7 @@
static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
{
map_word val;
val.x[0] = le16_to_cpu(readw(map->virt + ofs));
val.x[0] = flash_read16(map->virt + ofs);
return val;
}
@ -57,19 +102,28 @@ static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
static void ixp4xx_copy_from(struct map_info *map, void *to,
unsigned long from, ssize_t len)
{
int i;
u8 *dest = (u8 *) to;
void __iomem *src = map->virt + from;
u16 data;
for (i = 0; i < (len / 2); i++) {
data = le16_to_cpu(readw(src + 2*i));
dest[i * 2] = BYTE0(data);
dest[i * 2 + 1] = BYTE1(data);
if (len <= 0)
return;
if (from & 1) {
*dest++ = BYTE1(flash_read16(src));
src++;
--len;
}
if (len & 1)
dest[len - 1] = BYTE0(le16_to_cpu(readw(src + 2*i)));
while (len >= 2) {
u16 data = flash_read16(src);
*dest++ = BYTE0(data);
*dest++ = BYTE1(data);
src += 2;
len -= 2;
}
if (len > 0)
*dest++ = BYTE0(flash_read16(src));
}
/*
@ -79,7 +133,7 @@ static void ixp4xx_copy_from(struct map_info *map, void *to,
static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr)
{
if (!(adr & 1))
writew(cpu_to_le16(d.x[0]), map->virt + adr);
flash_write16(d.x[0], map->virt + adr);
}
/*
@ -87,7 +141,7 @@ static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long
*/
static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
{
writew(cpu_to_le16(d.x[0]), map->virt + adr);
flash_write16(d.x[0], map->virt + adr);
}
struct ixp4xx_flash_info {

4
drivers/mtd/maps/nettel.c
View File

@ -6,7 +6,7 @@
* (C) Copyright 2000-2001, Greg Ungerer (gerg@snapgear.com)
* (C) Copyright 2001-2002, SnapGear (www.snapgear.com)
*
* $Id: nettel.c,v 1.11 2005/11/07 11:14:27 gleixner Exp $
* $Id: nettel.c,v 1.12 2005/11/29 14:30:00 gleixner Exp $
*/
/****************************************************************************/
@ -479,7 +479,7 @@ void __exit nettel_cleanup(void)
}
if (nettel_intel_map.virt) {
iounmap(nettel_intel_map.virt);
nettel_intel_map.virt = 0;
nettel_intel_map.virt = NULL;
}
#endif
}

4
drivers/mtd/maps/pci.c
View File

@ -7,7 +7,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* $Id: pci.c,v 1.13 2005/11/07 11:14:27 gleixner Exp $
* $Id: pci.c,v 1.14 2005/11/17 08:20:27 dwmw2 Exp $
*
* Generic PCI memory map driver. We support the following boards:
* - Intel IQ80310 ATU.
@ -102,7 +102,7 @@ static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *
memcpy_toio(map->base + map->translate(map, to), from, len);
}
static struct map_info mtd_pci_map = {
static const struct map_info mtd_pci_map = {
.phys = NO_XIP,
.copy_from = mtd_pci_copyfrom,
.copy_to = mtd_pci_copyto,

3
drivers/mtd/maps/physmap.c
View File

@ -1,5 +1,5 @@
/*
* $Id: physmap.c,v 1.38 2005/11/07 11:14:28 gleixner Exp $
* $Id: physmap.c,v 1.39 2005/11/29 14:49:36 gleixner Exp $
*
* Normal mappings of chips in physical memory
*
@ -19,6 +19,7 @@
#include <linux/mtd/map.h>
#include <linux/config.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
static struct mtd_info *mymtd;

4
drivers/mtd/maps/sc520cdp.c
View File

@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*
* $Id: sc520cdp.c,v 1.22 2005/11/07 11:14:28 gleixner Exp $
* $Id: sc520cdp.c,v 1.23 2005/11/17 08:20:27 dwmw2 Exp $
*
*
* The SC520CDP is an evaluation board for the Elan SC520 processor available
@ -164,7 +164,7 @@ struct sc520_par_table
unsigned long default_address;
};
static struct sc520_par_table par_table[NUM_FLASH_BANKS] =
static const struct sc520_par_table par_table[NUM_FLASH_BANKS] =
{
{ /* Flash Bank #0: selected by ROMCS0 */
SC520_PAR_ROMCS0,

2
drivers/mtd/nand/nandsim.c
View File

@ -1486,7 +1486,7 @@ ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
/*
* Module initialization function
*/
int __init ns_init_module(void)
static int __init ns_init_module(void)
{
struct nand_chip *chip;
struct nandsim *nand;

6
drivers/mtd/rfd_ftl.c
View File

@ -30,11 +30,9 @@ MODULE_PARM_DESC(block_size, "Block size to use by RFD, defaults to erase unit s
#define PREFIX "rfd_ftl: "
/* Major device # for FTL device */
/* A request for this major has been sent to device@lanana.org */
/* This major has been assigned by device@lanana.org */
#ifndef RFD_FTL_MAJOR
#define RFD_FTL_MAJOR 95
#define RFD_FTL_MAJOR 256
#endif
/* Maximum number of partitions in an FTL region */

3
drivers/pcmcia/m32r_cfc.c
View File

@ -355,9 +355,10 @@ static void add_pcc_socket(ulong base, int irq, ulong mapaddr, kio_addr_t ioaddr
#ifndef CONFIG_PLAT_USRV
/* insert interrupt */
request_irq(irq, pcc_interrupt, 0, "m32r_cfc", pcc_interrupt);
#ifndef CONFIG_PLAT_MAPPI3
/* eject interrupt */
request_irq(irq+1, pcc_interrupt, 0, "m32r_cfc", pcc_interrupt);
#endif
debug(3, "m32r_cfc: enable CFMSK, RDYSEL\n");
pcc_set(pcc_sockets, (unsigned int)PLD_CFIMASK, 0x01);
#endif /* CONFIG_PLAT_USRV */

29
drivers/scsi/megaraid.c
View File

@ -380,23 +380,23 @@ megaraid_queue(Scsi_Cmnd *scmd, void (*done)(Scsi_Cmnd *))
spin_lock_irqsave(&adapter->lock, flags);
scb = mega_build_cmd(adapter, scmd, &busy);
if (!scb)
goto out;
if(scb) {
scb->state |= SCB_PENDQ;
list_add_tail(&scb->list, &adapter->pending_list);
scb->state |= SCB_PENDQ;
list_add_tail(&scb->list, &adapter->pending_list);
/*
* Check if the HBA is in quiescent state, e.g., during a
* delete logical drive opertion. If it is, don't run
* the pending_list.
*/
if(atomic_read(&adapter->quiescent) == 0) {
mega_runpendq(adapter);
}
return 0;
}
/*
* Check if the HBA is in quiescent state, e.g., during a
* delete logical drive opertion. If it is, don't run
* the pending_list.
*/
if (atomic_read(&adapter->quiescent) == 0)
mega_runpendq(adapter);
busy = 0;
out:
spin_unlock_irqrestore(&adapter->lock, flags);
return busy;
}
@ -4677,7 +4677,6 @@ megaraid_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
adapter->flag = flag;
spin_lock_init(&adapter->lock);
scsi_assign_lock(host, &adapter->lock);
host->cmd_per_lun = max_cmd_per_lun;
host->max_sectors = max_sectors_per_io;

2
drivers/serial/8250.c
View File

@ -102,7 +102,7 @@ static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
#define SERIAL_PORT_DFNS
#endif
static struct old_serial_port old_serial_port[] = {
static const struct old_serial_port old_serial_port[] = {
SERIAL_PORT_DFNS /* defined in asm/serial.h */
};

2
drivers/serial/8250_pci.c
View File

@ -468,7 +468,7 @@ static unsigned short timedia_eight_port[] = {
0x9167, 0x9168, 0xA066, 0xA167, 0xA168, 0
};
static struct timedia_struct {
static const struct timedia_struct {
int num;
unsigned short *ids;
} timedia_data[] = {

2
drivers/serial/serial_core.c
View File

@ -1779,7 +1779,7 @@ struct baud_rates {
unsigned int cflag;
};
static struct baud_rates baud_rates[] = {
static const struct baud_rates baud_rates[] = {
{ 921600, B921600 },
{ 460800, B460800 },
{ 230400, B230400 },

6
drivers/serial/serial_cs.c
View File

@ -85,7 +85,7 @@ struct multi_id {
int multi; /* 1 = multifunction, > 1 = # ports */
};
static struct multi_id multi_id[] = {
static const struct multi_id multi_id[] = {
{ MANFID_OMEGA, PRODID_OMEGA_QSP_100, 4 },
{ MANFID_QUATECH, PRODID_QUATECH_DUAL_RS232, 2 },
{ MANFID_QUATECH, PRODID_QUATECH_DUAL_RS232_D1, 2 },
@ -354,8 +354,8 @@ next_tuple(client_handle_t handle, tuple_t * tuple, cisparse_t * parse)
static int simple_config(dev_link_t *link)
{
static kio_addr_t base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
static int size_table[2] = { 8, 16 };
static const kio_addr_t base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
static const int size_table[2] = { 8, 16 };
client_handle_t handle = link->handle;
struct serial_info *info = link->priv;
struct serial_cfg_mem *cfg_mem;

4
drivers/usb/atm/usbatm.c
View File

@ -879,7 +879,7 @@ static int usbatm_atm_init(struct usbatm_data *instance)
fail:
instance->atm_dev = NULL;
shutdown_atm_dev(atm_dev); /* usbatm_atm_dev_close will eventually be called */
atm_dev_deregister(atm_dev); /* usbatm_atm_dev_close will eventually be called */
return ret;
}
@ -1164,7 +1164,7 @@ void usbatm_usb_disconnect(struct usb_interface *intf)
/* ATM finalize */
if (instance->atm_dev)
shutdown_atm_dev(instance->atm_dev);
atm_dev_deregister(instance->atm_dev);
usbatm_put_instance(instance); /* taken in usbatm_usb_probe */
}

13
drivers/video/Kconfig
View File

@ -534,6 +534,12 @@ config FB_SUN3
bool "Sun3 framebuffer support"
depends on (FB = y) && (SUN3 || SUN3X) && BROKEN
config FB_SBUS
bool "SBUS and UPA framebuffers"
depends on (FB = y) && (SPARC32 || SPARC64)
help
Say Y if you want support for SBUS or UPA based frame buffer device.
config FB_BW2
bool "BWtwo support"
depends on (FB = y) && ((SPARC32 || SPARC64) && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3)
@ -546,6 +552,7 @@ config FB_BW2
config FB_CG3
bool "CGthree support"
depends on (FB = y) && ((SPARC32 || SPARC64) && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3)
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
help
@ -1210,12 +1217,6 @@ config FB_AU1100
source "drivers/video/geode/Kconfig"
config FB_SBUS
bool "SBUS and UPA framebuffers"
depends on (FB = y) && (SPARC32 || SPARC64)
help
Say Y if you want support for SBUS or UPA based frame buffer device.
config FB_FFB
bool "Creator/Creator3D/Elite3D support"
depends on FB_SBUS && SPARC64

15
drivers/video/cirrusfb.c
View File

@ -404,7 +404,7 @@ struct cirrusfb_info {
struct cirrusfb_regs currentmode;
int blank_mode;
u32 pseudo_palette[17];
u32 pseudo_palette[16];
struct { u8 red, green, blue, pad; } palette[256];
#ifdef CONFIG_ZORRO
@ -1603,14 +1603,14 @@ static int cirrusfb_setcolreg (unsigned regno, unsigned red, unsigned green,
switch (info->var.bits_per_pixel) {
case 8:
((u8*)(info->pseudo_palette))[regno] = v;
cinfo->pseudo_palette[regno] = v;
break;
case 16:
((u16*)(info->pseudo_palette))[regno] = v;
cinfo->pseudo_palette[regno] = v;
break;
case 24:
case 32:
((u32*)(info->pseudo_palette))[regno] = v;
cinfo->pseudo_palette[regno] = v;
break;
}
return 0;
@ -2020,18 +2020,21 @@ static void cirrusfb_prim_fillrect(struct cirrusfb_info *cinfo,
const struct fb_fillrect *region)
{
int m; /* bytes per pixel */
u32 color = (cinfo->info->fix.visual == FB_VISUAL_TRUECOLOR) ?
cinfo->pseudo_palette[region->color] : region->color;
if(cinfo->info->var.bits_per_pixel == 1) {
cirrusfb_RectFill(cinfo->regbase, cinfo->info->var.bits_per_pixel,
region->dx / 8, region->dy,
region->width / 8, region->height,
region->color,
color,
cinfo->currentmode.line_length);
} else {
m = ( cinfo->info->var.bits_per_pixel + 7 ) / 8;
cirrusfb_RectFill(cinfo->regbase, cinfo->info->var.bits_per_pixel,
region->dx * m, region->dy,
region->width * m, region->height,
region->color,
color,
cinfo->currentmode.line_length);
}
return;

2
drivers/video/console/fbcon_ccw.c
View File

@ -34,7 +34,7 @@ static inline void ccw_update_attr(u8 *dst, u8 *src, int attribute,
msk <<= (8 - mod);
if (offset > mod)
set_bit(FBCON_BIT(7), (void *)&msk1);
msk1 |= 0x01;
for (i = 0; i < vc->vc_font.width; i++) {
for (j = 0; j < width; j++) {

13
drivers/video/console/fbcon_rotate.h
View File

@ -21,21 +21,13 @@
(s == SCROLL_REDRAW || s == SCROLL_MOVE || !(i)->fix.xpanstep) ? \
(i)->var.xres : (i)->var.xres_virtual; })
/*
* The bitmap is always big endian
*/
#if defined(__LITTLE_ENDIAN)
#define FBCON_BIT(b) (7 - (b))
#else
#define FBCON_BIT(b) (b)
#endif
static inline int pattern_test_bit(u32 x, u32 y, u32 pitch, const char *pat)
{
u32 tmp = (y * pitch) + x, index = tmp / 8, bit = tmp % 8;
pat +=index;
return (test_bit(FBCON_BIT(bit), (void *)pat));
return (*pat) & (0x80 >> bit);
}
static inline void pattern_set_bit(u32 x, u32 y, u32 pitch, char *pat)
@ -43,7 +35,8 @@ static inline void pattern_set_bit(u32 x, u32 y, u32 pitch, char *pat)
u32 tmp = (y * pitch) + x, index = tmp / 8, bit = tmp % 8;
pat += index;
set_bit(FBCON_BIT(bit), (void *)pat);
(*pat) |= 0x80 >> bit;
}
static inline void rotate_ud(const char *in, char *out, u32 width, u32 height)

2
fs/9p/vfs_inode.c
View File

@ -427,6 +427,8 @@ v9fs_create(struct inode *dir,
v9fs_mistat2inode(fcall->params.rstat.stat, file_inode, sb);
kfree(fcall);
fcall = NULL;
file_dentry->d_op = &v9fs_dentry_operations;
d_instantiate(file_dentry, file_inode);
if (perm & V9FS_DMDIR) {

6
fs/dquot.c
View File

@ -1513,10 +1513,16 @@ int vfs_quota_on_mount(struct super_block *sb, char *qf_name,
if (IS_ERR(dentry))
return PTR_ERR(dentry);
if (!dentry->d_inode) {
error = -ENOENT;
goto out;
}
error = security_quota_on(dentry);
if (!error)
error = vfs_quota_on_inode(dentry->d_inode, type, format_id);
out:
dput(dentry);
return error;
}

12
fs/exec.c
View File

@ -306,9 +306,6 @@ void install_arg_page(struct vm_area_struct *vma,
struct page *page, unsigned long address)
{
struct mm_struct *mm = vma->vm_mm;
pgd_t * pgd;
pud_t * pud;
pmd_t * pmd;
pte_t * pte;
spinlock_t *ptl;
@ -316,14 +313,7 @@ void install_arg_page(struct vm_area_struct *vma,
goto out;
flush_dcache_page(page);
pgd = pgd_offset(mm, address);
pud = pud_alloc(mm, pgd, address);
if (!pud)
goto out;
pmd = pmd_alloc(mm, pud, address);
if (!pmd)
goto out;
pte = pte_alloc_map_lock(mm, pmd, address, &ptl);
pte = get_locked_pte(mm, address, &ptl);
if (!pte)
goto out;
if (!pte_none(*pte)) {

1
fs/ext3/resize.c
View File

@ -767,6 +767,7 @@ int ext3_group_add(struct super_block *sb, struct ext3_new_group_data *input)
if (input->group != EXT3_SB(sb)->s_groups_count) {
ext3_warning(sb, __FUNCTION__,
"multiple resizers run on filesystem!\n");
err = -EBUSY;
goto exit_journal;
}

37
fs/fuse/dir.c
View File

@ -74,6 +74,24 @@ static int fuse_dentry_revalidate(struct dentry *entry, struct nameidata *nd)
return 1;
}
static int dir_alias(struct inode *inode)
{
if (S_ISDIR(inode->i_mode)) {
/* Don't allow creating an alias to a directory */
struct dentry *alias = d_find_alias(inode);
if (alias) {
dput(alias);
return 1;
}
}
return 0;
}
static inline int invalid_nodeid(u64 nodeid)
{
return !nodeid || nodeid == FUSE_ROOT_ID;
}
static struct dentry_operations fuse_dentry_operations = {
.d_revalidate = fuse_dentry_revalidate,
};
@ -97,7 +115,7 @@ static int fuse_lookup_iget(struct inode *dir, struct dentry *entry,
fuse_lookup_init(req, dir, entry, &outarg);
request_send(fc, req);
err = req->out.h.error;
if (!err && (!outarg.nodeid || outarg.nodeid == FUSE_ROOT_ID))
if (!err && invalid_nodeid(outarg.nodeid))
err = -EIO;
if (!err) {
inode = fuse_iget(dir->i_sb, outarg.nodeid, outarg.generation,
@ -193,7 +211,7 @@ static int fuse_create_open(struct inode *dir, struct dentry *entry, int mode,
}
err = -EIO;
if (!S_ISREG(outentry.attr.mode))
if (!S_ISREG(outentry.attr.mode) || invalid_nodeid(outentry.nodeid))
goto out_free_ff;
inode = fuse_iget(dir->i_sb, outentry.nodeid, outentry.generation,
@ -250,7 +268,7 @@ static int create_new_entry(struct fuse_conn *fc, struct fuse_req *req,
fuse_put_request(fc, req);
return err;
}
if (!outarg.nodeid || outarg.nodeid == FUSE_ROOT_ID) {
if (invalid_nodeid(outarg.nodeid)) {
fuse_put_request(fc, req);
return -EIO;
}
@ -263,7 +281,7 @@ static int create_new_entry(struct fuse_conn *fc, struct fuse_req *req,
fuse_put_request(fc, req);
/* Don't allow userspace to do really stupid things... */
if ((inode->i_mode ^ mode) & S_IFMT) {
if (((inode->i_mode ^ mode) & S_IFMT) || dir_alias(inode)) {
iput(inode);
return -EIO;
}
@ -874,14 +892,9 @@ static struct dentry *fuse_lookup(struct inode *dir, struct dentry *entry,
err = fuse_lookup_iget(dir, entry, &inode);
if (err)
return ERR_PTR(err);
if (inode && S_ISDIR(inode->i_mode)) {
/* Don't allow creating an alias to a directory */
struct dentry *alias = d_find_alias(inode);
if (alias) {
dput(alias);
iput(inode);
return ERR_PTR(-EIO);
}
if (inode && dir_alias(inode)) {
iput(inode);
return ERR_PTR(-EIO);
}
d_add(entry, inode);
return NULL;

1
fs/hfsplus/hfsplus_fs.h
View File

@ -151,6 +151,7 @@ struct hfsplus_sb_info {
#define HFSPLUS_SB_WRITEBACKUP 0x0001
#define HFSPLUS_SB_NODECOMPOSE 0x0002
#define HFSPLUS_SB_FORCE 0x0004
struct hfsplus_inode_info {

12
fs/hfsplus/hfsplus_raw.h
View File

@ -123,11 +123,13 @@ struct hfsplus_vh {
} __packed;
/* HFS+ volume attributes */
#define HFSPLUS_VOL_UNMNT (1 << 8)
#define HFSPLUS_VOL_SPARE_BLK (1 << 9)
#define HFSPLUS_VOL_NOCACHE (1 << 10)
#define HFSPLUS_VOL_INCNSTNT (1 << 11)
#define HFSPLUS_VOL_SOFTLOCK (1 << 15)
#define HFSPLUS_VOL_UNMNT (1 << 8)
#define HFSPLUS_VOL_SPARE_BLK (1 << 9)
#define HFSPLUS_VOL_NOCACHE (1 << 10)
#define HFSPLUS_VOL_INCNSTNT (1 << 11)
#define HFSPLUS_VOL_NODEID_REUSED (1 << 12)
#define HFSPLUS_VOL_JOURNALED (1 << 13)
#define HFSPLUS_VOL_SOFTLOCK (1 << 15)
/* HFS+ BTree node descriptor */
struct hfs_bnode_desc {

6
fs/hfsplus/options.c
View File

@ -22,7 +22,7 @@ enum {
opt_umask, opt_uid, opt_gid,
opt_part, opt_session, opt_nls,
opt_nodecompose, opt_decompose,
opt_err
opt_force, opt_err
};
static match_table_t tokens = {
@ -36,6 +36,7 @@ static match_table_t tokens = {
{ opt_nls, "nls=%s" },
{ opt_decompose, "decompose" },
{ opt_nodecompose, "nodecompose" },
{ opt_force, "force" },
{ opt_err, NULL }
};
@ -145,6 +146,9 @@ int hfsplus_parse_options(char *input, struct hfsplus_sb_info *sbi)
case opt_nodecompose:
sbi->flags |= HFSPLUS_SB_NODECOMPOSE;
break;
case opt_force:
sbi->flags |= HFSPLUS_SB_FORCE;
break;
default:
return 0;
}

20
fs/hfsplus/super.c
View File

@ -251,16 +251,28 @@ static int hfsplus_remount(struct super_block *sb, int *flags, char *data)
return 0;
if (!(*flags & MS_RDONLY)) {
struct hfsplus_vh *vhdr = HFSPLUS_SB(sb).s_vhdr;
struct hfsplus_sb_info sbi;
memset(&sbi, 0, sizeof(struct hfsplus_sb_info));
sbi.nls = HFSPLUS_SB(sb).nls;
if (!hfsplus_parse_options(data, &sbi))
return -EINVAL;
if (!(vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_UNMNT))) {
printk("HFS+-fs warning: Filesystem was not cleanly unmounted, "
"running fsck.hfsplus is recommended. leaving read-only.\n");
sb->s_flags |= MS_RDONLY;
*flags |= MS_RDONLY;
} else if (sbi.flags & HFSPLUS_SB_FORCE) {
/* nothing */
} else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_SOFTLOCK)) {
printk("HFS+-fs: Filesystem is marked locked, leaving read-only.\n");
sb->s_flags |= MS_RDONLY;
*flags |= MS_RDONLY;
} else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_JOURNALED)) {
printk("HFS+-fs: Filesystem is marked journaled, leaving read-only.\n");
sb->s_flags |= MS_RDONLY;
*flags |= MS_RDONLY;
}
}
return 0;
@ -352,11 +364,19 @@ static int hfsplus_fill_super(struct super_block *sb, void *data, int silent)
printk("HFS+-fs warning: Filesystem was not cleanly unmounted, "
"running fsck.hfsplus is recommended. mounting read-only.\n");
sb->s_flags |= MS_RDONLY;
} else if (sbi->flags & HFSPLUS_SB_FORCE) {
/* nothing */
} else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_SOFTLOCK)) {
if (!silent)
printk("HFS+-fs: Filesystem is marked locked, mounting read-only.\n");
sb->s_flags |= MS_RDONLY;
} else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_JOURNALED)) {
if (!silent)
printk("HFS+-fs: write access to a jounaled filesystem is not supported, "
"use the force option at your own risk, mounting read-only.\n");
sb->s_flags |= MS_RDONLY;
}
sbi->flags &= ~HFSPLUS_SB_FORCE;
/* Load metadata objects (B*Trees) */
HFSPLUS_SB(sb).ext_tree = hfs_btree_open(sb, HFSPLUS_EXT_CNID);

2
fs/jffs2/fs.c
View File

@ -234,6 +234,7 @@ void jffs2_read_inode (struct inode *inode)
c = JFFS2_SB_INFO(inode->i_sb);
jffs2_init_inode_info(f);
down(&f->sem);
ret = jffs2_do_read_inode(c, f, inode->i_ino, &latest_node);
@ -400,6 +401,7 @@ struct inode *jffs2_new_inode (struct inode *dir_i, int mode, struct jffs2_raw_i
f = JFFS2_INODE_INFO(inode);
jffs2_init_inode_info(f);
down(&f->sem);
memset(ri, 0, sizeof(*ri));
/* Set OS-specific defaults for new inodes */

2
fs/jffs2/super.c
View File

@ -51,7 +51,7 @@ static void jffs2_i_init_once(void * foo, kmem_cache_t * cachep, unsigned long f
if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) ==
SLAB_CTOR_CONSTRUCTOR) {
init_MUTEX_LOCKED(&ei->sem);
init_MUTEX(&ei->sem);
inode_init_once(&ei->vfs_inode);
}
}

7
fs/proc/task_mmu.c
View File

@ -402,12 +402,11 @@ struct numa_maps {
/*
* Calculate numa node maps for a vma
*/
static struct numa_maps *get_numa_maps(const struct vm_area_struct *vma)
static struct numa_maps *get_numa_maps(struct vm_area_struct *vma)
{
int i;
struct page *page;
unsigned long vaddr;
struct mm_struct *mm = vma->vm_mm;
int i;
struct numa_maps *md = kmalloc(sizeof(struct numa_maps), GFP_KERNEL);
if (!md)
@ -420,7 +419,7 @@ static struct numa_maps *get_numa_maps(const struct vm_area_struct *vma)
md->node[i] =0;
for (vaddr = vma->vm_start; vaddr < vma->vm_end; vaddr += PAGE_SIZE) {
page = follow_page(mm, vaddr, 0);
page = follow_page(vma, vaddr, 0);
if (page) {
int count = page_mapcount(page);

2
fs/reiserfs/inode.c
View File

@ -2194,7 +2194,7 @@ static int map_block_for_writepage(struct inode *inode,
INITIALIZE_PATH(path);
int pos_in_item;
int jbegin_count = JOURNAL_PER_BALANCE_CNT;
loff_t byte_offset = (block << inode->i_sb->s_blocksize_bits) + 1;
loff_t byte_offset = ((loff_t)block << inode->i_sb->s_blocksize_bits)+1;
int retval;
int use_get_block = 0;
int bytes_copied = 0;

9
fs/reiserfs/journal.c
View File

@ -2757,6 +2757,15 @@ int journal_init(struct super_block *p_s_sb, const char *j_dev_name,
journal->j_cnode_used = 0;
journal->j_must_wait = 0;
if (journal->j_cnode_free == 0) {
reiserfs_warning(p_s_sb, "journal-2004: Journal cnode memory "
"allocation failed (%ld bytes). Journal is "
"too large for available memory. Usually "
"this is due to a journal that is too large.",
sizeof (struct reiserfs_journal_cnode) * num_cnodes);
goto free_and_return;
}
init_journal_hash(p_s_sb);
jl = journal->j_current_jl;
jl->j_list_bitmap = get_list_bitmap(p_s_sb, jl);

239
include/asm-arm/arch-s3c2410/regs-gpio.h
View File

@ -21,6 +21,7 @@
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 28-Mar-2005 LCVR Fixed definition of GPB10
* 26-Oct-2005 BJD Added generic configuration types
* 27-Nov-2005 LCVR Added definitions to S3C2400 registers
*/
@ -54,12 +55,16 @@
#define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO)
/* port A - 22bits, zero in bit X makes pin X output
/* port A - S3C2410: 22bits, zero in bit X makes pin X output
* S3C2400: 18bits, zero in bit X makes pin X output
* 1 makes port special function, this is default
*/
#define S3C2410_GPACON S3C2410_GPIOREG(0x00)
#define S3C2410_GPADAT S3C2410_GPIOREG(0x04)
#define S3C2400_GPACON S3C2410_GPIOREG(0x00)
#define S3C2400_GPADAT S3C2410_GPIOREG(0x04)
#define S3C2410_GPA0 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 0)
#define S3C2410_GPA0_OUT (0<<0)
#define S3C2410_GPA0_ADDR0 (1<<0)
@ -103,34 +108,42 @@
#define S3C2410_GPA10 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 10)
#define S3C2410_GPA10_OUT (0<<10)
#define S3C2410_GPA10_ADDR25 (1<<10)
#define S3C2400_GPA10_SCKE (1<<10)
#define S3C2410_GPA11 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 11)
#define S3C2410_GPA11_OUT (0<<11)
#define S3C2410_GPA11_ADDR26 (1<<11)
#define S3C2400_GPA11_nCAS0 (1<<11)
#define S3C2410_GPA12 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 12)
#define S3C2410_GPA12_OUT (0<<12)
#define S3C2410_GPA12_nGCS1 (1<<12)
#define S3C2400_GPA12_nCAS1 (1<<12)
#define S3C2410_GPA13 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 13)
#define S3C2410_GPA13_OUT (0<<13)
#define S3C2410_GPA13_nGCS2 (1<<13)
#define S3C2400_GPA13_nGCS1 (1<<13)
#define S3C2410_GPA14 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 14)
#define S3C2410_GPA14_OUT (0<<14)
#define S3C2410_GPA14_nGCS3 (1<<14)
#define S3C2400_GPA14_nGCS2 (1<<14)
#define S3C2410_GPA15 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 15)
#define S3C2410_GPA15_OUT (0<<15)
#define S3C2410_GPA15_nGCS4 (1<<15)
#define S3C2400_GPA15_nGCS3 (1<<15)
#define S3C2410_GPA16 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 16)
#define S3C2410_GPA16_OUT (0<<16)
#define S3C2410_GPA16_nGCS5 (1<<16)
#define S3C2400_GPA16_nGCS4 (1<<16)
#define S3C2410_GPA17 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 17)
#define S3C2410_GPA17_OUT (0<<17)
#define S3C2410_GPA17_CLE (1<<17)
#define S3C2400_GPA17_nGCS5 (1<<17)
#define S3C2410_GPA18 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 18)
#define S3C2410_GPA18_OUT (0<<18)
@ -152,10 +165,16 @@
#define S3C2410_GPA22_OUT (0<<22)
#define S3C2410_GPA22_nFCE (1<<22)
/* 0x08 and 0x0c are reserved */
/* 0x08 and 0x0c are reserved on S3C2410 */
/* GPB is 10 IO pins, each configured by 2 bits each in GPBCON.
/* S3C2410:
* GPB is 10 IO pins, each configured by 2 bits each in GPBCON.
* 00 = input, 01 = output, 10=special function, 11=reserved
* S3C2400:
* GPB is 16 IO pins, each configured by 2 bits each in GPBCON.
* 00 = input, 01 = output, 10=data, 11=special function
* bit 0,1 = pin 0, 2,3= pin 1...
*
* CPBUP = pull up resistor control, 1=disabled, 0=enabled
@ -165,63 +184,113 @@
#define S3C2410_GPBDAT S3C2410_GPIOREG(0x14)
#define S3C2410_GPBUP S3C2410_GPIOREG(0x18)
#define S3C2400_GPBCON S3C2410_GPIOREG(0x08)
#define S3C2400_GPBDAT S3C2410_GPIOREG(0x0C)
#define S3C2400_GPBUP S3C2410_GPIOREG(0x10)
/* no i/o pin in port b can have value 3! */
#define S3C2410_GPB0 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 0)
#define S3C2410_GPB0_INP (0x00 << 0)
#define S3C2410_GPB0_OUTP (0x01 << 0)
#define S3C2410_GPB0_TOUT0 (0x02 << 0)
#define S3C2400_GPB0_DATA16 (0x02 << 0)
#define S3C2410_GPB1 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 1)
#define S3C2410_GPB1_INP (0x00 << 2)
#define S3C2410_GPB1_OUTP (0x01 << 2)
#define S3C2410_GPB1_TOUT1 (0x02 << 2)
#define S3C2400_GPB1_DATA17 (0x02 << 2)
#define S3C2410_GPB2 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 2)
#define S3C2410_GPB2_INP (0x00 << 4)
#define S3C2410_GPB2_OUTP (0x01 << 4)
#define S3C2410_GPB2_TOUT2 (0x02 << 4)
#define S3C2400_GPB2_DATA18 (0x02 << 4)
#define S3C2400_GPB2_TCLK1 (0x03 << 4)
#define S3C2410_GPB3 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 3)
#define S3C2410_GPB3_INP (0x00 << 6)
#define S3C2410_GPB3_OUTP (0x01 << 6)
#define S3C2410_GPB3_TOUT3 (0x02 << 6)
#define S3C2400_GPB3_DATA19 (0x02 << 6)
#define S3C2400_GPB3_TXD1 (0x03 << 6)
#define S3C2410_GPB4 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 4)
#define S3C2410_GPB4_INP (0x00 << 8)
#define S3C2410_GPB4_OUTP (0x01 << 8)
#define S3C2410_GPB4_TCLK0 (0x02 << 8)
#define S3C2400_GPB4_DATA20 (0x02 << 8)
#define S3C2410_GPB4_MASK (0x03 << 8)
#define S3C2400_GPB4_RXD1 (0x03 << 8)
#define S3C2400_GPB4_MASK (0x03 << 8)
#define S3C2410_GPB5 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 5)
#define S3C2410_GPB5_INP (0x00 << 10)
#define S3C2410_GPB5_OUTP (0x01 << 10)
#define S3C2410_GPB5_nXBACK (0x02 << 10)
#define S3C2400_GPB5_DATA21 (0x02 << 10)
#define S3C2400_GPB5_nCTS1 (0x03 << 10)
#define S3C2410_GPB6 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 6)
#define S3C2410_GPB6_INP (0x00 << 12)
#define S3C2410_GPB6_OUTP (0x01 << 12)
#define S3C2410_GPB6_nXBREQ (0x02 << 12)
#define S3C2400_GPB6_DATA22 (0x02 << 12)
#define S3C2400_GPB6_nRTS1 (0x03 << 12)
#define S3C2410_GPB7 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 7)
#define S3C2410_GPB7_INP (0x00 << 14)
#define S3C2410_GPB7_OUTP (0x01 << 14)
#define S3C2410_GPB7_nXDACK1 (0x02 << 14)
#define S3C2400_GPB7_DATA23 (0x02 << 14)
#define S3C2410_GPB8 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 8)
#define S3C2410_GPB8_INP (0x00 << 16)
#define S3C2410_GPB8_OUTP (0x01 << 16)
#define S3C2410_GPB8_nXDREQ1 (0x02 << 16)
#define S3C2400_GPB8_DATA24 (0x02 << 16)
#define S3C2410_GPB9 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 9)
#define S3C2410_GPB9_INP (0x00 << 18)
#define S3C2410_GPB9_OUTP (0x01 << 18)
#define S3C2410_GPB9_nXDACK0 (0x02 << 18)
#define S3C2400_GPB9_DATA25 (0x02 << 18)
#define S3C2400_GPB9_I2SSDI (0x03 << 18)
#define S3C2410_GPB10 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 10)
#define S3C2410_GPB10_INP (0x00 << 20)
#define S3C2410_GPB10_OUTP (0x01 << 20)
#define S3C2410_GPB10_nXDRE0 (0x02 << 20)
#define S3C2400_GPB10_DATA26 (0x02 << 20)
#define S3C2400_GPB10_nSS (0x03 << 20)
#define S3C2400_GPB11 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 11)
#define S3C2400_GPB11_INP (0x00 << 22)
#define S3C2400_GPB11_OUTP (0x01 << 22)
#define S3C2400_GPB11_DATA27 (0x02 << 22)
#define S3C2400_GPB12 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 12)
#define S3C2400_GPB12_INP (0x00 << 24)
#define S3C2400_GPB12_OUTP (0x01 << 24)
#define S3C2400_GPB12_DATA28 (0x02 << 24)
#define S3C2400_GPB13 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 13)
#define S3C2400_GPB13_INP (0x00 << 26)
#define S3C2400_GPB13_OUTP (0x01 << 26)
#define S3C2400_GPB13_DATA29 (0x02 << 26)
#define S3C2400_GPB14 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 14)
#define S3C2400_GPB14_INP (0x00 << 28)
#define S3C2400_GPB14_OUTP (0x01 << 28)
#define S3C2400_GPB14_DATA30 (0x02 << 28)
#define S3C2400_GPB15 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 15)
#define S3C2400_GPB15_INP (0x00 << 30)
#define S3C2400_GPB15_OUTP (0x01 << 30)
#define S3C2400_GPB15_DATA31 (0x02 << 30)
#define S3C2410_GPB_PUPDIS(x) (1<<(x))
/* Port C consits of 16 GPIO/Special function
*
@ -233,150 +302,193 @@
#define S3C2410_GPCDAT S3C2410_GPIOREG(0x24)
#define S3C2410_GPCUP S3C2410_GPIOREG(0x28)
#define S3C2400_GPCCON S3C2410_GPIOREG(0x14)
#define S3C2400_GPCDAT S3C2410_GPIOREG(0x18)
#define S3C2400_GPCUP S3C2410_GPIOREG(0x1C)
#define S3C2410_GPC0 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 0)
#define S3C2410_GPC0_INP (0x00 << 0)
#define S3C2410_GPC0_OUTP (0x01 << 0)
#define S3C2410_GPC0_LEND (0x02 << 0)
#define S3C2400_GPC0_VD0 (0x02 << 0)
#define S3C2410_GPC1 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 1)
#define S3C2410_GPC1_INP (0x00 << 2)
#define S3C2410_GPC1_OUTP (0x01 << 2)
#define S3C2410_GPC1_VCLK (0x02 << 2)
#define S3C2400_GPC1_VD1 (0x02 << 2)
#define S3C2410_GPC2 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 2)
#define S3C2410_GPC2_INP (0x00 << 4)
#define S3C2410_GPC2_OUTP (0x01 << 4)
#define S3C2410_GPC2_VLINE (0x02 << 4)
#define S3C2400_GPC2_VD2 (0x02 << 4)
#define S3C2410_GPC3 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 3)
#define S3C2410_GPC3_INP (0x00 << 6)
#define S3C2410_GPC3_OUTP (0x01 << 6)
#define S3C2410_GPC3_VFRAME (0x02 << 6)
#define S3C2400_GPC3_VD3 (0x02 << 6)
#define S3C2410_GPC4 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 4)
#define S3C2410_GPC4_INP (0x00 << 8)
#define S3C2410_GPC4_OUTP (0x01 << 8)
#define S3C2410_GPC4_VM (0x02 << 8)
#define S3C2400_GPC4_VD4 (0x02 << 8)
#define S3C2410_GPC5 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 5)
#define S3C2410_GPC5_INP (0x00 << 10)
#define S3C2410_GPC5_OUTP (0x01 << 10)
#define S3C2410_GPC5_LCDVF0 (0x02 << 10)
#define S3C2400_GPC5_VD5 (0x02 << 10)
#define S3C2410_GPC6 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 6)
#define S3C2410_GPC6_INP (0x00 << 12)
#define S3C2410_GPC6_OUTP (0x01 << 12)
#define S3C2410_GPC6_LCDVF1 (0x02 << 12)
#define S3C2400_GPC6_VD6 (0x02 << 12)
#define S3C2410_GPC7 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 7)
#define S3C2410_GPC7_INP (0x00 << 14)
#define S3C2410_GPC7_OUTP (0x01 << 14)
#define S3C2410_GPC7_LCDVF2 (0x02 << 14)
#define S3C2400_GPC7_VD7 (0x02 << 14)
#define S3C2410_GPC8 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 8)
#define S3C2410_GPC8_INP (0x00 << 16)
#define S3C2410_GPC8_OUTP (0x01 << 16)
#define S3C2410_GPC8_VD0 (0x02 << 16)
#define S3C2400_GPC8_VD8 (0x02 << 16)
#define S3C2410_GPC9 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 9)
#define S3C2410_GPC9_INP (0x00 << 18)
#define S3C2410_GPC9_OUTP (0x01 << 18)
#define S3C2410_GPC9_VD1 (0x02 << 18)
#define S3C2400_GPC9_VD9 (0x02 << 18)
#define S3C2410_GPC10 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 10)
#define S3C2410_GPC10_INP (0x00 << 20)
#define S3C2410_GPC10_OUTP (0x01 << 20)
#define S3C2410_GPC10_VD2 (0x02 << 20)
#define S3C2400_GPC10_VD10 (0x02 << 20)
#define S3C2410_GPC11 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 11)
#define S3C2410_GPC11_INP (0x00 << 22)
#define S3C2410_GPC11_OUTP (0x01 << 22)
#define S3C2410_GPC11_VD3 (0x02 << 22)
#define S3C2400_GPC11_VD11 (0x02 << 22)
#define S3C2410_GPC12 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 12)
#define S3C2410_GPC12_INP (0x00 << 24)
#define S3C2410_GPC12_OUTP (0x01 << 24)
#define S3C2410_GPC12_VD4 (0x02 << 24)
#define S3C2400_GPC12_VD12 (0x02 << 24)
#define S3C2410_GPC13 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 13)
#define S3C2410_GPC13_INP (0x00 << 26)
#define S3C2410_GPC13_OUTP (0x01 << 26)
#define S3C2410_GPC13_VD5 (0x02 << 26)
#define S3C2400_GPC13_VD13 (0x02 << 26)
#define S3C2410_GPC14 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 14)
#define S3C2410_GPC14_INP (0x00 << 28)
#define S3C2410_GPC14_OUTP (0x01 << 28)
#define S3C2410_GPC14_VD6 (0x02 << 28)
#define S3C2400_GPC14_VD14 (0x02 << 28)
#define S3C2410_GPC15 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 15)
#define S3C2410_GPC15_INP (0x00 << 30)
#define S3C2410_GPC15_OUTP (0x01 << 30)
#define S3C2410_GPC15_VD7 (0x02 << 30)
#define S3C2400_GPC15_VD15 (0x02 << 30)
/* Port D consists of 16 GPIO/Special function
#define S3C2410_GPC_PUPDIS(x) (1<<(x))
/*
* S3C2410: Port D consists of 16 GPIO/Special function
*
* almost identical setup to port b, but the special functions are mostly
* to do with the video system's data.
*
* S3C2400: Port D consists of 11 GPIO/Special function
*
* almost identical setup to port c
*/
#define S3C2410_GPDCON S3C2410_GPIOREG(0x30)
#define S3C2410_GPDDAT S3C2410_GPIOREG(0x34)
#define S3C2410_GPDUP S3C2410_GPIOREG(0x38)
#define S3C2400_GPDCON S3C2410_GPIOREG(0x20)
#define S3C2400_GPDDAT S3C2410_GPIOREG(0x24)
#define S3C2400_GPDUP S3C2410_GPIOREG(0x28)
#define S3C2410_GPD0 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 0)
#define S3C2410_GPD0_INP (0x00 << 0)
#define S3C2410_GPD0_OUTP (0x01 << 0)
#define S3C2410_GPD0_VD8 (0x02 << 0)
#define S3C2400_GPD0_VFRAME (0x02 << 0)
#define S3C2410_GPD1 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 1)
#define S3C2410_GPD1_INP (0x00 << 2)
#define S3C2410_GPD1_OUTP (0x01 << 2)
#define S3C2410_GPD1_VD9 (0x02 << 2)
#define S3C2400_GPD1_VM (0x02 << 2)
#define S3C2410_GPD2 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 2)
#define S3C2410_GPD2_INP (0x00 << 4)
#define S3C2410_GPD2_OUTP (0x01 << 4)
#define S3C2410_GPD2_VD10 (0x02 << 4)
#define S3C2400_GPD2_VLINE (0x02 << 4)
#define S3C2410_GPD3 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 3)
#define S3C2410_GPD3_INP (0x00 << 6)
#define S3C2410_GPD3_OUTP (0x01 << 6)
#define S3C2410_GPD3_VD11 (0x02 << 6)
#define S3C2400_GPD3_VCLK (0x02 << 6)
#define S3C2410_GPD4 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 4)
#define S3C2410_GPD4_INP (0x00 << 8)
#define S3C2410_GPD4_OUTP (0x01 << 8)
#define S3C2410_GPD4_VD12 (0x02 << 8)
#define S3C2400_GPD4_LEND (0x02 << 8)
#define S3C2410_GPD5 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 5)
#define S3C2410_GPD5_INP (0x00 << 10)
#define S3C2410_GPD5_OUTP (0x01 << 10)
#define S3C2410_GPD5_VD13 (0x02 << 10)
#define S3C2400_GPD5_TOUT0 (0x02 << 10)
#define S3C2410_GPD6 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 6)
#define S3C2410_GPD6_INP (0x00 << 12)
#define S3C2410_GPD6_OUTP (0x01 << 12)
#define S3C2410_GPD6_VD14 (0x02 << 12)
#define S3C2400_GPD6_TOUT1 (0x02 << 12)
#define S3C2410_GPD7 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 7)
#define S3C2410_GPD7_INP (0x00 << 14)
#define S3C2410_GPD7_OUTP (0x01 << 14)
#define S3C2410_GPD7_VD15 (0x02 << 14)
#define S3C2400_GPD7_TOUT2 (0x02 << 14)
#define S3C2410_GPD8 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 8)
#define S3C2410_GPD8_INP (0x00 << 16)
#define S3C2410_GPD8_OUTP (0x01 << 16)
#define S3C2410_GPD8_VD16 (0x02 << 16)
#define S3C2400_GPD8_TOUT3 (0x02 << 16)
#define S3C2410_GPD9 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 9)
#define S3C2410_GPD9_INP (0x00 << 18)
#define S3C2410_GPD9_OUTP (0x01 << 18)
#define S3C2410_GPD9_VD17 (0x02 << 18)
#define S3C2400_GPD9_TCLK0 (0x02 << 18)
#define S3C2410_GPD9_MASK (0x03 << 18)
#define S3C2410_GPD10 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 10)
#define S3C2410_GPD10_INP (0x00 << 20)
#define S3C2410_GPD10_OUTP (0x01 << 20)
#define S3C2410_GPD10_VD18 (0x02 << 20)
#define S3C2400_GPD10_nWAIT (0x02 << 20)
#define S3C2410_GPD11 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 11)
#define S3C2410_GPD11_INP (0x00 << 22)
@ -403,37 +515,56 @@
#define S3C2410_GPD15_OUTP (0x01 << 30)
#define S3C2410_GPD15_VD23 (0x02 << 30)
/* Port E consists of 16 GPIO/Special function
#define S3C2410_GPD_PUPDIS(x) (1<<(x))
/* S3C2410:
* Port E consists of 16 GPIO/Special function
*
* again, the same as port B, but dealing with I2S, SDI, and
* more miscellaneous functions
*
* S3C2400:
* Port E consists of 12 GPIO/Special function
*
* GPIO / interrupt inputs
*/
#define S3C2410_GPECON S3C2410_GPIOREG(0x40)
#define S3C2410_GPEDAT S3C2410_GPIOREG(0x44)
#define S3C2410_GPEUP S3C2410_GPIOREG(0x48)
#define S3C2400_GPECON S3C2410_GPIOREG(0x2C)
#define S3C2400_GPEDAT S3C2410_GPIOREG(0x30)
#define S3C2400_GPEUP S3C2410_GPIOREG(0x34)
#define S3C2410_GPE0 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 0)
#define S3C2410_GPE0_INP (0x00 << 0)
#define S3C2410_GPE0_OUTP (0x01 << 0)
#define S3C2410_GPE0_I2SLRCK (0x02 << 0)
#define S3C2400_GPE0_EINT0 (0x02 << 0)
#define S3C2410_GPE0_MASK (0x03 << 0)
#define S3C2410_GPE1 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 1)
#define S3C2410_GPE1_INP (0x00 << 2)
#define S3C2410_GPE1_OUTP (0x01 << 2)
#define S3C2410_GPE1_I2SSCLK (0x02 << 2)
#define S3C2400_GPE1_EINT1 (0x02 << 2)
#define S3C2400_GPE1_nSS (0x03 << 2)
#define S3C2410_GPE1_MASK (0x03 << 2)
#define S3C2410_GPE2 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 2)
#define S3C2410_GPE2_INP (0x00 << 4)
#define S3C2410_GPE2_OUTP (0x01 << 4)
#define S3C2410_GPE2_CDCLK (0x02 << 4)
#define S3C2400_GPE2_EINT2 (0x02 << 4)
#define S3C2400_GPE2_I2SSDI (0x03 << 4)
#define S3C2410_GPE3 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 3)
#define S3C2410_GPE3_INP (0x00 << 6)
#define S3C2410_GPE3_OUTP (0x01 << 6)
#define S3C2410_GPE3_I2SSDI (0x02 << 6)
#define S3C2400_GPE3_EINT3 (0x02 << 6)
#define S3C2400_GPE3_nCTS1 (0x03 << 6)
#define S3C2410_GPE3_nSS0 (0x03 << 6)
#define S3C2410_GPE3_MASK (0x03 << 6)
@ -441,6 +572,8 @@
#define S3C2410_GPE4_INP (0x00 << 8)
#define S3C2410_GPE4_OUTP (0x01 << 8)
#define S3C2410_GPE4_I2SSDO (0x02 << 8)
#define S3C2400_GPE4_EINT4 (0x02 << 8)
#define S3C2400_GPE4_nRTS1 (0x03 << 8)
#define S3C2410_GPE4_I2SSDI (0x03 << 8)
#define S3C2410_GPE4_MASK (0x03 << 8)
@ -448,36 +581,46 @@
#define S3C2410_GPE5_INP (0x00 << 10)
#define S3C2410_GPE5_OUTP (0x01 << 10)
#define S3C2410_GPE5_SDCLK (0x02 << 10)
#define S3C2400_GPE5_EINT5 (0x02 << 10)
#define S3C2400_GPE5_TCLK1 (0x03 << 10)
#define S3C2410_GPE6 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 6)
#define S3C2410_GPE6_INP (0x00 << 12)
#define S3C2410_GPE6_OUTP (0x01 << 12)
#define S3C2410_GPE6_SDCMD (0x02 << 12)
#define S3C2400_GPE6_EINT6 (0x02 << 12)
#define S3C2410_GPE7 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 7)
#define S3C2410_GPE7_INP (0x00 << 14)
#define S3C2410_GPE7_OUTP (0x01 << 14)
#define S3C2410_GPE7_SDDAT0 (0x02 << 14)
#define S3C2400_GPE7_EINT7 (0x02 << 14)
#define S3C2410_GPE8 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 8)
#define S3C2410_GPE8_INP (0x00 << 16)
#define S3C2410_GPE8_OUTP (0x01 << 16)
#define S3C2410_GPE8_SDDAT1 (0x02 << 16)
#define S3C2400_GPE8_nXDACK0 (0x02 << 16)
#define S3C2410_GPE9 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 9)
#define S3C2410_GPE9_INP (0x00 << 18)
#define S3C2410_GPE9_OUTP (0x01 << 18)
#define S3C2410_GPE9_SDDAT2 (0x02 << 18)
#define S3C2400_GPE9_nXDACK1 (0x02 << 18)
#define S3C2400_GPE9_nXBACK (0x03 << 18)
#define S3C2410_GPE10 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 10)
#define S3C2410_GPE10_INP (0x00 << 20)
#define S3C2410_GPE10_OUTP (0x01 << 20)
#define S3C2410_GPE10_SDDAT3 (0x02 << 20)
#define S3C2400_GPE10_nXDREQ0 (0x02 << 20)
#define S3C2410_GPE11 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 11)
#define S3C2410_GPE11_INP (0x00 << 22)
#define S3C2410_GPE11_OUTP (0x01 << 22)
#define S3C2410_GPE11_SPIMISO0 (0x02 << 22)
#define S3C2400_GPE11_nXDREQ1 (0x02 << 22)
#define S3C2400_GPE11_nXBREQ (0x03 << 22)
#define S3C2410_GPE12 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 12)
#define S3C2410_GPE12_INP (0x00 << 24)
@ -509,7 +652,8 @@
#define S3C2410_GPE_PUPDIS(x) (1<<(x))
/* Port F consists of 8 GPIO/Special function
/* S3C2410:
* Port F consists of 8 GPIO/Special function
*
* GPIO / interrupt inputs
*
@ -517,100 +661,141 @@
* 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 undefined
*
* pull up works like all other ports.
*
* S3C2400:
* Port F consists of 7 GPIO/Special function
*
* GPIO/serial/misc pins
*/
#define S3C2410_GPFCON S3C2410_GPIOREG(0x50)
#define S3C2410_GPFDAT S3C2410_GPIOREG(0x54)
#define S3C2410_GPFUP S3C2410_GPIOREG(0x58)
#define S3C2400_GPFCON S3C2410_GPIOREG(0x38)
#define S3C2400_GPFDAT S3C2410_GPIOREG(0x3C)
#define S3C2400_GPFUP S3C2410_GPIOREG(0x40)
#define S3C2410_GPF0 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 0)
#define S3C2410_GPF0_INP (0x00 << 0)
#define S3C2410_GPF0_OUTP (0x01 << 0)
#define S3C2410_GPF0_EINT0 (0x02 << 0)
#define S3C2400_GPF0_RXD0 (0x02 << 0)
#define S3C2410_GPF1 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 1)
#define S3C2410_GPF1_INP (0x00 << 2)
#define S3C2410_GPF1_OUTP (0x01 << 2)
#define S3C2410_GPF1_EINT1 (0x02 << 2)
#define S3C2400_GPF1_RXD1 (0x02 << 2)
#define S3C2400_GPF1_IICSDA (0x03 << 2)
#define S3C2410_GPF2 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 2)
#define S3C2410_GPF2_INP (0x00 << 4)
#define S3C2410_GPF2_OUTP (0x01 << 4)
#define S3C2410_GPF2_EINT2 (0x02 << 4)
#define S3C2400_GPF2_TXD0 (0x02 << 4)
#define S3C2410_GPF3 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 3)
#define S3C2410_GPF3_INP (0x00 << 6)
#define S3C2410_GPF3_OUTP (0x01 << 6)
#define S3C2410_GPF3_EINT3 (0x02 << 6)
#define S3C2400_GPF3_TXD1 (0x02 << 6)
#define S3C2400_GPF3_IICSCL (0x03 << 6)
#define S3C2410_GPF4 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 4)
#define S3C2410_GPF4_INP (0x00 << 8)
#define S3C2410_GPF4_OUTP (0x01 << 8)
#define S3C2410_GPF4_EINT4 (0x02 << 8)
#define S3C2400_GPF4_nRTS0 (0x02 << 8)
#define S3C2400_GPF4_nXBACK (0x03 << 8)
#define S3C2410_GPF5 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 5)
#define S3C2410_GPF5_INP (0x00 << 10)
#define S3C2410_GPF5_OUTP (0x01 << 10)
#define S3C2410_GPF5_EINT5 (0x02 << 10)
#define S3C2400_GPF5_nCTS0 (0x02 << 10)
#define S3C2400_GPF5_nXBREQ (0x03 << 10)
#define S3C2410_GPF6 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 6)
#define S3C2410_GPF6_INP (0x00 << 12)
#define S3C2410_GPF6_OUTP (0x01 << 12)
#define S3C2410_GPF6_EINT6 (0x02 << 12)
#define S3C2400_GPF6_CLKOUT (0x02 << 12)
#define S3C2410_GPF7 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 7)
#define S3C2410_GPF7_INP (0x00 << 14)
#define S3C2410_GPF7_OUTP (0x01 << 14)
#define S3C2410_GPF7_EINT7 (0x02 << 14)
/* Port G consists of 8 GPIO/IRQ/Special function
#define S3C2410_GPF_PUPDIS(x) (1<<(x))
/* S3C2410:
* Port G consists of 8 GPIO/IRQ/Special function
*
* GPGCON has 2 bits for each of the input pins on port F
* 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func
*
* pull up works like all other ports.
*
* S3C2400:
* Port G consists of 10 GPIO/Special function
*/
#define S3C2410_GPGCON S3C2410_GPIOREG(0x60)
#define S3C2410_GPGDAT S3C2410_GPIOREG(0x64)
#define S3C2410_GPGUP S3C2410_GPIOREG(0x68)
#define S3C2400_GPGCON S3C2410_GPIOREG(0x44)
#define S3C2400_GPGDAT S3C2410_GPIOREG(0x48)
#define S3C2400_GPGUP S3C2410_GPIOREG(0x4C)
#define S3C2410_GPG0 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 0)
#define S3C2410_GPG0_INP (0x00 << 0)
#define S3C2410_GPG0_OUTP (0x01 << 0)
#define S3C2410_GPG0_EINT8 (0x02 << 0)
#define S3C2400_GPG0_I2SLRCK (0x02 << 0)
#define S3C2410_GPG1 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 1)
#define S3C2410_GPG1_INP (0x00 << 2)
#define S3C2410_GPG1_OUTP (0x01 << 2)
#define S3C2410_GPG1_EINT9 (0x02 << 2)
#define S3C2400_GPG1_I2SSCLK (0x02 << 2)
#define S3C2410_GPG2 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 2)
#define S3C2410_GPG2_INP (0x00 << 4)
#define S3C2410_GPG2_OUTP (0x01 << 4)
#define S3C2410_GPG2_EINT10 (0x02 << 4)
#define S3C2400_GPG2_CDCLK (0x02 << 4)
#define S3C2410_GPG3 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 3)
#define S3C2410_GPG3_INP (0x00 << 6)
#define S3C2410_GPG3_OUTP (0x01 << 6)
#define S3C2410_GPG3_EINT11 (0x02 << 6)
#define S3C2400_GPG3_I2SSDO (0x02 << 6)
#define S3C2400_GPG3_I2SSDI (0x03 << 6)
#define S3C2410_GPG4 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 4)
#define S3C2410_GPG4_INP (0x00 << 8)
#define S3C2410_GPG4_OUTP (0x01 << 8)
#define S3C2410_GPG4_EINT12 (0x02 << 8)
#define S3C2400_GPG4_MMCCLK (0x02 << 8)
#define S3C2400_GPG4_I2SSDI (0x03 << 8)
#define S3C2410_GPG4_LCDPWREN (0x03 << 8)
#define S3C2410_GPG5 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 5)
#define S3C2410_GPG5_INP (0x00 << 10)
#define S3C2410_GPG5_OUTP (0x01 << 10)
#define S3C2410_GPG5_EINT13 (0x02 << 10)
#define S3C2400_GPG5_MMCCMD (0x02 << 10)
#define S3C2400_GPG5_IICSDA (0x03 << 10)
#define S3C2410_GPG5_SPIMISO1 (0x03 << 10)
#define S3C2410_GPG6 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 6)
#define S3C2410_GPG6_INP (0x00 << 12)
#define S3C2410_GPG6_OUTP (0x01 << 12)
#define S3C2410_GPG6_EINT14 (0x02 << 12)
#define S3C2400_GPG6_MMCDAT (0x02 << 12)
#define S3C2400_GPG6_IICSCL (0x03 << 12)
#define S3C2410_GPG6_SPIMOSI1 (0x03 << 12)
#define S3C2410_GPG7 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 7)
@ -618,16 +803,22 @@
#define S3C2410_GPG7_OUTP (0x01 << 14)
#define S3C2410_GPG7_EINT15 (0x02 << 14)
#define S3C2410_GPG7_SPICLK1 (0x03 << 14)
#define S3C2400_GPG7_SPIMISO (0x02 << 14)
#define S3C2400_GPG7_IICSDA (0x03 << 14)
#define S3C2410_GPG8 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 8)
#define S3C2410_GPG8_INP (0x00 << 16)
#define S3C2410_GPG8_OUTP (0x01 << 16)
#define S3C2410_GPG8_EINT16 (0x02 << 16)
#define S3C2400_GPG8_SPIMOSI (0x02 << 16)
#define S3C2400_GPG8_IICSCL (0x03 << 16)
#define S3C2410_GPG9 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 9)
#define S3C2410_GPG9_INP (0x00 << 18)
#define S3C2410_GPG9_OUTP (0x01 << 18)
#define S3C2410_GPG9_EINT17 (0x02 << 18)
#define S3C2400_GPG9_SPICLK (0x02 << 18)
#define S3C2400_GPG9_MMCCLK (0x03 << 18)
#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
#define S3C2410_GPG10_INP (0x00 << 20)
@ -737,19 +928,27 @@
#define S3C2410_GPH10_CLKOUT1 (0x02 << 20)
/* miscellaneous control */
#define S3C2400_MISCCR S3C2410_GPIOREG(0x54)
#define S3C2410_MISCCR S3C2410_GPIOREG(0x80)
#define S3C2410_DCLKCON S3C2410_GPIOREG(0x84)
/* see clock.h for dclk definitions */
/* pullup control on databus */
#define S3C2410_MISCCR_SPUCR_HEN (0)
#define S3C2410_MISCCR_SPUCR_HEN (0<<0)
#define S3C2410_MISCCR_SPUCR_HDIS (1<<0)
#define S3C2410_MISCCR_SPUCR_LEN (0)
#define S3C2410_MISCCR_SPUCR_LEN (0<<1)
#define S3C2410_MISCCR_SPUCR_LDIS (1<<1)
#define S3C2410_MISCCR_USBDEV (0)
#define S3C2400_MISCCR_SPUCR_LEN (0<<0)
#define S3C2400_MISCCR_SPUCR_LDIS (1<<0)
#define S3C2400_MISCCR_SPUCR_HEN (0<<1)
#define S3C2400_MISCCR_SPUCR_HDIS (1<<1)
#define S3C2400_MISCCR_HZ_STOPEN (0<<2)
#define S3C2400_MISCCR_HZ_STOPPREV (1<<2)
#define S3C2410_MISCCR_USBDEV (0<<3)
#define S3C2410_MISCCR_USBHOST (1<<3)
#define S3C2410_MISCCR_CLK0_MPLL (0<<4)
@ -785,7 +984,7 @@
*
* Samsung datasheet p9-25
*/
#define S3C2400_EXTINT0 S3C2410_GPIOREG(0x58)
#define S3C2410_EXTINT0 S3C2410_GPIOREG(0x88)
#define S3C2410_EXTINT1 S3C2410_GPIOREG(0x8C)
#define S3C2410_EXTINT2 S3C2410_GPIOREG(0x90)
@ -833,5 +1032,21 @@
#define S3C2410_GSTATUS2_OFFRESET (1<<1)
#define S3C2410_GSTATUS2_PONRESET (1<<0)
/* open drain control register */
#define S3C2400_OPENCR S3C2410_GPIOREG(0x50)
#define S3C2400_OPENCR_OPC_RXD1DIS (0<<0)
#define S3C2400_OPENCR_OPC_RXD1EN (1<<0)
#define S3C2400_OPENCR_OPC_TXD1DIS (0<<1)
#define S3C2400_OPENCR_OPC_TXD1EN (1<<1)
#define S3C2400_OPENCR_OPC_CMDDIS (0<<2)
#define S3C2400_OPENCR_OPC_CMDEN (1<<2)
#define S3C2400_OPENCR_OPC_DATDIS (0<<3)
#define S3C2400_OPENCR_OPC_DATEN (1<<3)
#define S3C2400_OPENCR_OPC_MISODIS (0<<4)
#define S3C2400_OPENCR_OPC_MISOEN (1<<4)
#define S3C2400_OPENCR_OPC_MOSIDIS (0<<5)
#define S3C2400_OPENCR_OPC_MOSIEN (1<<5)
#endif /* __ASM_ARCH_REGS_GPIO_H */

2
include/asm-arm/arch-sa1100/io.h
View File

@ -10,8 +10,6 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#include <asm/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
/*

1
include/asm-frv/hardirq.h
View File

@ -14,6 +14,7 @@
#include <linux/config.h>
#include <linux/threads.h>
#include <linux/irq.h>
typedef struct {
unsigned int __softirq_pending;

8
include/asm-frv/ide.h
View File

@ -33,10 +33,10 @@
/*
* some bits needed for parts of the IDE subsystem to compile
*/
#define __ide_mm_insw(port, addr, n) insw(port, addr, n)
#define __ide_mm_insl(port, addr, n) insl(port, addr, n)
#define __ide_mm_outsw(port, addr, n) outsw(port, addr, n)
#define __ide_mm_outsl(port, addr, n) outsl(port, addr, n)
#define __ide_mm_insw(port, addr, n) insw((unsigned long) (port), addr, n)
#define __ide_mm_insl(port, addr, n) insl((unsigned long) (port), addr, n)
#define __ide_mm_outsw(port, addr, n) outsw((unsigned long) (port), addr, n)
#define __ide_mm_outsl(port, addr, n) outsl((unsigned long) (port), addr, n)
#endif /* __KERNEL__ */

4
include/asm-frv/page.h
View File

@ -47,8 +47,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
#define devmem_is_allowed(pfn) 1
#define __pa(vaddr) virt_to_phys((void *) vaddr)
#define __va(paddr) phys_to_virt((unsigned long) paddr)
#define __pa(vaddr) virt_to_phys((void *) (unsigned long) (vaddr))
#define __va(paddr) phys_to_virt((unsigned long) (paddr))
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)

2
include/asm-frv/semaphore.h
View File

@ -20,7 +20,7 @@
#include <linux/spinlock.h>
#include <linux/rwsem.h>
#define SEMAPHORE_DEBUG WAITQUEUE_DEBUG
#define SEMAPHORE_DEBUG 0
/*
* the semaphore definition

2
include/asm-frv/thread_info.h
View File

@ -58,7 +58,7 @@ struct thread_info {
#endif
#define PREEMPT_ACTIVE 0x4000000
#define PREEMPT_ACTIVE 0x10000000
/*
* macros/functions for gaining access to the thread information structure

3
include/asm-ia64/page.h
View File

@ -110,8 +110,9 @@ extern int ia64_pfn_valid (unsigned long pfn);
# define pfn_to_page(pfn) (mem_map + (pfn))
#elif defined(CONFIG_DISCONTIGMEM)
extern struct page *vmem_map;
extern unsigned long min_low_pfn;
extern unsigned long max_low_pfn;
# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn))
# define pfn_valid(pfn) (((pfn) >= min_low_pfn) && ((pfn) < max_low_pfn) && ia64_pfn_valid(pfn))
# define page_to_pfn(page) ((unsigned long) (page - vmem_map))
# define pfn_to_page(pfn) (vmem_map + (pfn))
#endif

21
include/asm-m32r/atomic.h
View File

@ -242,6 +242,27 @@ static __inline__ int atomic_dec_return(atomic_t *v)
*/
#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
/**
* atomic_add_unless - add unless the number is a given value
* @v: pointer of type atomic_t
* @a: the amount to add to v...
* @u: ...unless v is equal to u.
*
* Atomically adds @a to @v, so long as it was not @u.
* Returns non-zero if @v was not @u, and zero otherwise.
*/
#define atomic_add_unless(v, a, u) \
({ \
int c, old; \
c = atomic_read(v); \
while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
c = old; \
c != (u); \
})
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
{
unsigned long flags;

13
include/asm-m32r/ide.h
View File

@ -25,20 +25,23 @@
# endif
#endif
#if defined(CONFIG_PLAT_M32700UT)
#include <asm/irq.h>
#include <asm/m32700ut/m32700ut_pld.h>
#endif
#include <asm/m32r.h>
#define IDE_ARCH_OBSOLETE_DEFAULTS
static __inline__ int ide_default_irq(unsigned long base)
{
switch (base) {
#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3)
#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2)
case 0x1f0: return PLD_IRQ_CFIREQ;
default:
return 0;
#elif defined(CONFIG_PLAT_MAPPI3)
case 0x1f0: return PLD_IRQ_CFIREQ;
case 0x170: return PLD_IRQ_IDEIREQ;
default:
return 0;
#else
case 0x1f0: return 14;
case 0x170: return 15;

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