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drm/i915: Do not set any power wells when there is no display

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Power wells are only part of display block and not necessary when
running a headless driver.

Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210408203150.237947-2-jose.souza@intel.com
This commit is contained in:
José Roberto de Souza 2021-04-08 13:31:49 -07:00
parent a844cfbe64
commit 61a60d7962
1 changed files with 4 additions and 1 deletions
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5
drivers/gpu/drm/i915/display/intel_display_power.c
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@ -4674,7 +4674,10 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
* The enabling order will be from lower to higher indexed wells,
* the disabling order is reversed.
*/
if (IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv)) {
if (!HAS_DISPLAY(dev_priv)) {
power_domains->power_well_count = 0;
err = 0;
} else if (IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv)) {
err = set_power_wells_mask(power_domains, tgl_power_wells,
BIT_ULL(TGL_DISP_PW_TC_COLD_OFF));
} else if (IS_ROCKETLAKE(dev_priv)) {