ARM: OMAP2+: PRM: provide generic API for system reset

This patch combines the various prm_warm_reset calls under a common
API prm_reset_system, and adds the SoC specific implementation under
prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tero Kristo 2014-10-27 08:39:26 -07:00 committed by Tony Lindgren
parent 4984eeaf71
commit 61c8621e2b
13 changed files with 36 additions and 22 deletions

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@ -9,8 +9,7 @@
#include <linux/reboot.h> #include <linux/reboot.h>
#include "common.h" #include "common.h"
#include "prm-regbits-33xx.h" #include "prm.h"
#include "prm33xx.h"
/** /**
* am3xx_restart - trigger a software restart of the SoC * am3xx_restart - trigger a software restart of the SoC
@ -24,5 +23,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
{ {
/* TODO: Handle mode and cmd if necessary */ /* TODO: Handle mode and cmd if necessary */
am33xx_prm_global_warm_sw_reset(); omap_prm_reset_system();
} }

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@ -15,7 +15,7 @@
#include "soc.h" #include "soc.h"
#include "common.h" #include "common.h"
#include "prm2xxx.h" #include "prm.h"
/* /*
* reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set * reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
@ -40,8 +40,7 @@ void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
/* XXX Should save the cmd argument for use after the reboot */ /* XXX Should save the cmd argument for use after the reboot */
omap2xxx_prm_dpll_reset(); /* never returns */ omap_prm_reset_system();
while (1);
} }
/** /**

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@ -14,10 +14,8 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/reboot.h> #include <linux/reboot.h>
#include "iomap.h"
#include "common.h"
#include "control.h" #include "control.h"
#include "prm3xxx.h" #include "prm.h"
/* Global address base setup code */ /* Global address base setup code */
@ -32,6 +30,5 @@
void omap3xxx_restart(enum reboot_mode mode, const char *cmd) void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
{ {
omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
omap3xxx_prm_dpll3_reset(); /* never returns */ omap_prm_reset_system();
while (1);
} }

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@ -9,7 +9,7 @@
#include <linux/types.h> #include <linux/types.h>
#include <linux/reboot.h> #include <linux/reboot.h>
#include "prminst44xx.h" #include "prm.h"
/** /**
* omap44xx_restart - trigger a software restart of the SoC * omap44xx_restart - trigger a software restart of the SoC
@ -22,7 +22,5 @@
void omap44xx_restart(enum reboot_mode mode, const char *cmd) void omap44xx_restart(enum reboot_mode mode, const char *cmd)
{ {
/* XXX Should save 'cmd' into scratchpad for use after reboot */ /* XXX Should save 'cmd' into scratchpad for use after reboot */
omap4_prminst_global_warm_sw_reset(); /* never returns */ omap_prm_reset_system();
while (1)
;
} }

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@ -144,6 +144,7 @@ struct prm_ll_data {
u16 offset, u16 st_offset); u16 offset, u16 st_offset);
int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod, int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
u16 offset); u16 offset);
void (*reset_system)(void);
}; };
extern int prm_register(struct prm_ll_data *pld); extern int prm_register(struct prm_ll_data *pld);
@ -156,6 +157,7 @@ int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
extern u32 prm_read_reset_sources(void); extern u32 prm_read_reset_sources(void);
extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx); extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx); extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
void omap_prm_reset_system(void);
void omap_prm_reconfigure_io_chain(void); void omap_prm_reconfigure_io_chain(void);

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@ -106,7 +106,7 @@ static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
* Set the DPLL reset bit, which should reboot the SoC. This is the * Set the DPLL reset bit, which should reboot the SoC. This is the
* recommended way to restart the SoC. No return value. * recommended way to restart the SoC. No return value.
*/ */
void omap2xxx_prm_dpll_reset(void) static void omap2xxx_prm_dpll_reset(void)
{ {
omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD, omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
OMAP2_RM_RSTCTRL); OMAP2_RM_RSTCTRL);
@ -215,6 +215,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
.assert_hardreset = &omap2_prm_assert_hardreset, .assert_hardreset = &omap2_prm_assert_hardreset,
.deassert_hardreset = &omap2_prm_deassert_hardreset, .deassert_hardreset = &omap2_prm_deassert_hardreset,
.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
.reset_system = &omap2xxx_prm_dpll_reset,
}; };
int __init omap2xxx_prm_init(void) int __init omap2xxx_prm_init(void)

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@ -124,7 +124,6 @@
extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
extern void omap2xxx_prm_dpll_reset(void);
void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
extern int __init omap2xxx_prm_init(void); extern int __init omap2xxx_prm_init(void);

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@ -341,7 +341,7 @@ static int am33xx_check_vcvp(void)
* *
* Immediately reboots the device through warm reset. * Immediately reboots the device through warm reset.
*/ */
void am33xx_prm_global_warm_sw_reset(void) static void am33xx_prm_global_warm_sw_reset(void)
{ {
am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK, am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
AM33XX_RST_GLOBAL_WARM_SW_MASK, AM33XX_RST_GLOBAL_WARM_SW_MASK,
@ -375,6 +375,7 @@ static struct prm_ll_data am33xx_prm_ll_data = {
.assert_hardreset = am33xx_prm_assert_hardreset, .assert_hardreset = am33xx_prm_assert_hardreset,
.deassert_hardreset = am33xx_prm_deassert_hardreset, .deassert_hardreset = am33xx_prm_deassert_hardreset,
.is_hardreset_asserted = am33xx_prm_is_hardreset_asserted, .is_hardreset_asserted = am33xx_prm_is_hardreset_asserted,
.reset_system = am33xx_prm_global_warm_sw_reset,
}; };
int __init am33xx_prm_init(void) int __init am33xx_prm_init(void)

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@ -118,7 +118,6 @@
#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004) #define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
extern void am33xx_prm_global_warm_sw_reset(void);
int am33xx_prm_init(void); int am33xx_prm_init(void);
#endif /* ASSEMBLER */ #endif /* ASSEMBLER */

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@ -136,7 +136,7 @@ u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
* recommended way to restart the SoC, considering Errata i520. No * recommended way to restart the SoC, considering Errata i520. No
* return value. * return value.
*/ */
void omap3xxx_prm_dpll3_reset(void) static void omap3xxx_prm_dpll3_reset(void)
{ {
omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD, omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD,
OMAP2_RM_RSTCTRL); OMAP2_RM_RSTCTRL);
@ -663,6 +663,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
.assert_hardreset = &omap2_prm_assert_hardreset, .assert_hardreset = &omap2_prm_assert_hardreset,
.deassert_hardreset = &omap2_prm_deassert_hardreset, .deassert_hardreset = &omap2_prm_deassert_hardreset,
.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
.reset_system = &omap3xxx_prm_dpll3_reset,
}; };
int __init omap3xxx_prm_init(void) int __init omap3xxx_prm_init(void)

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@ -144,8 +144,6 @@ extern u32 omap3_prm_vcvp_read(u8 offset);
extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern void omap3_prm_vcvp_write(u32 val, u8 offset);
extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
extern void omap3xxx_prm_dpll3_reset(void);
extern int __init omap3xxx_prm_init(void); extern int __init omap3xxx_prm_init(void);
extern u32 omap3xxx_prm_get_reset_sources(void); extern u32 omap3xxx_prm_get_reset_sources(void);
int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits); int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);

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@ -697,6 +697,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
.assert_hardreset = omap4_prminst_assert_hardreset, .assert_hardreset = omap4_prminst_assert_hardreset,
.deassert_hardreset = omap4_prminst_deassert_hardreset, .deassert_hardreset = omap4_prminst_deassert_hardreset,
.is_hardreset_asserted = omap4_prminst_is_hardreset_asserted, .is_hardreset_asserted = omap4_prminst_is_hardreset_asserted,
.reset_system = omap4_prminst_global_warm_sw_reset,
}; };
int __init omap44xx_prm_init(void) int __init omap44xx_prm_init(void)

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@ -502,6 +502,25 @@ void omap_prm_reconfigure_io_chain(void)
prcm_irq_setup->reconfigure_io_chain(); prcm_irq_setup->reconfigure_io_chain();
} }
/**
* omap_prm_reset_system - trigger global SW reset
*
* Triggers SoC specific global warm reset to reboot the device.
*/
void omap_prm_reset_system(void)
{
if (!prm_ll_data->reset_system) {
WARN_ONCE(1, "prm: %s: no mapping function defined\n",
__func__);
return;
}
prm_ll_data->reset_system();
while (1)
cpu_relax();
}
/** /**
* prm_register - register per-SoC low-level data with the PRM * prm_register - register per-SoC low-level data with the PRM
* @pld: low-level per-SoC OMAP PRM data & function pointers to register * @pld: low-level per-SoC OMAP PRM data & function pointers to register