[ARM] 5192/1: ARM TLB: add v7wbi_{possible,always}_flags to {possible,always}_tlb_flags
Commit 2ccdd1e77da52ad494e9af46bf272d816830cb28 doesn't add v7wbi_possible_flags and v7wbi_always_flags to possible_tlb_flags and always_tlb_flags. This causes the L2 cache flush in clean_pmd_entry() (intended for Feroceon only) to execute on ARMv7, and the CPU hangs. This patch is required for OMAP3 boards to boot. Signed-off-by: Paul Walmsley <paul@pwsan.com> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -54,6 +54,7 @@
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* v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
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* v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
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* fr - Feroceon (v4wbi with non-outer-cacheable page table walks)
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* fr - Feroceon (v4wbi with non-outer-cacheable page table walks)
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* v6wbi - ARMv6 with write buffer with I TLB flush entry instruction
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* v6wbi - ARMv6 with write buffer with I TLB flush entry instruction
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* v7wbi - identical to v6wbi
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*/
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*/
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#undef _TLB
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#undef _TLB
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#undef MULTI_TLB
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#undef MULTI_TLB
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@ -266,14 +267,16 @@ extern struct cpu_tlb_fns cpu_tlb;
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v4wbi_possible_flags | \
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v4wbi_possible_flags | \
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fr_possible_flags | \
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fr_possible_flags | \
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v4wb_possible_flags | \
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v4wb_possible_flags | \
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v6wbi_possible_flags)
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v6wbi_possible_flags | \
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v7wbi_possible_flags)
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#define always_tlb_flags (v3_always_flags & \
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#define always_tlb_flags (v3_always_flags & \
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v4_always_flags & \
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v4_always_flags & \
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v4wbi_always_flags & \
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v4wbi_always_flags & \
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fr_always_flags & \
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fr_always_flags & \
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v4wb_always_flags & \
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v4wb_always_flags & \
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v6wbi_always_flags)
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v6wbi_always_flags & \
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v7wbi_always_flags)
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#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
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#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
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