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Merge remote branch 'keithp/drm-intel-fixes' of /ssd/git/drm-next into drm-fixes

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* 'keithp/drm-intel-fixes' of /ssd/git/drm-next:
  drm/i915: Reset GMBUS controller after NAK
  drm/i915: Busy-spin wait_for condition in atomic contexts
  drm/i915/lvds: Always return connected in the absence of better information
This commit is contained in:
Dave Airlie 2011-04-01 10:55:26 +10:00
commit 61df611d5e
3 changed files with 24 additions and 13 deletions
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2
drivers/gpu/drm/i915/intel_drv.h
View File

@ -39,7 +39,7 @@
ret__ = -ETIMEDOUT; \
break; \
} \
if (W && !in_dbg_master()) msleep(W); \
if (W && !(in_atomic() || in_dbg_master())) msleep(W); \
} \
ret__; \
})

25
drivers/gpu/drm/i915/intel_i2c.c
View File

@ -259,7 +259,7 @@ gmbus_xfer(struct i2c_adapter *adapter,
if (wait_for(I915_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_RDY), 50))
goto timeout;
if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
return 0;
goto clear_err;
val = I915_READ(GMBUS3 + reg_offset);
do {
@ -287,7 +287,7 @@ gmbus_xfer(struct i2c_adapter *adapter,
if (wait_for(I915_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_RDY), 50))
goto timeout;
if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
return 0;
goto clear_err;
val = loop = 0;
do {
@ -302,14 +302,31 @@ gmbus_xfer(struct i2c_adapter *adapter,
if (i + 1 < num && wait_for(I915_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE), 50))
goto timeout;
if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
return 0;
goto clear_err;
}
return num;
goto done;
clear_err:
/* Toggle the Software Clear Interrupt bit. This has the effect
* of resetting the GMBUS controller and so clearing the
* BUS_ERROR raised by the slave's NAK.
*/
I915_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT);
I915_WRITE(GMBUS1 + reg_offset, 0);
done:
/* Mark the GMBUS interface as disabled. We will re-enable it at the
* start of the next xfer, till then let it sleep.
*/
I915_WRITE(GMBUS0 + reg_offset, 0);
return i;
timeout:
DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d [%s]\n",
bus->reg0 & 0xff, bus->adapter.name);
I915_WRITE(GMBUS0 + reg_offset, 0);
/* Hardware may not support GMBUS over these pins? Try GPIO bitbanging instead. */
bus->force_bit = intel_gpio_create(dev_priv, bus->reg0 & 0xff);
if (!bus->force_bit)

10
drivers/gpu/drm/i915/intel_lvds.c
View File

@ -473,19 +473,13 @@ static enum drm_connector_status
intel_lvds_detect(struct drm_connector *connector, bool force)
{
struct drm_device *dev = connector->dev;
enum drm_connector_status status = connector_status_connected;
enum drm_connector_status status;
status = intel_panel_detect(dev);
if (status != connector_status_unknown)
return status;
/* ACPI lid methods were generally unreliable in this generation, so
* don't even bother.
*/
if (IS_GEN2(dev) || IS_GEN3(dev))
return connector_status_connected;
return status;
return connector_status_connected;
}
/**