iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

PCI: imx6: Support more than Gen2 speed link mode

Browse Source 
Support more than Gen2 speed link mode, since i.MX8MP PCIe supports up to
Gen3 link speed.

Link: https://lore.kernel.org/r/1658287576-26908-1-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Richard Zhu 2022-07-20 11:26:16 +08:00 committed by Bjorn Helgaas
parent 13f8f3d1e3
commit 6213c6c545
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/pci/controller/dwc/pci-imx6.c
View File

@ -844,12 +844,12 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
if (ret)
goto err_reset_phy;
if (pci->link_gen == 2) {
/* Allow Gen2 mode after the link is up. */
if (pci->link_gen > 1) {
/* Allow faster modes after the link is up */
dw_pcie_dbi_ro_wr_en(pci);
tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
tmp &= ~PCI_EXP_LNKCAP_SLS;
tmp |= PCI_EXP_LNKCAP_SLS_5_0GB;
tmp |= pci->link_gen;
dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp);
/*
@ -884,7 +884,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
if (ret)
goto err_reset_phy;
} else {
dev_info(dev, "Link: Gen2 disabled\n");
dev_info(dev, "Link: Only Gen1 is enabled\n");
}
imx6_pcie->link_is_up = true;